EP20K1000EFC672-2X Altera, EP20K1000EFC672-2X Datasheet - Page 58

APEX 20KE

EP20K1000EFC672-2X

Manufacturer Part Number
EP20K1000EFC672-2X
Description
APEX 20KE
Manufacturer
Altera
Datasheet

Specifications of EP20K1000EFC672-2X

Family Name
APEX 20K
Number Of Usable Gates
1000000
Number Of Logic Blocks/elements
38400
# Registers
160
# I/os (max)
508
Frequency (max)
350MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
38400
Ram Bits
327680
Device System Gates
1772000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
Lead Free Status / Rohs Status
Not Compliant

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
EP20K1000EFC672-2X
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP20K1000EFC672-2X
Manufacturer:
ALTERA
0
APEX 20K Programmable Logic Device Family Data Sheet
Generic Testing
58
f
Table 22
devices.
For more information, see the following documents:
Each APEX 20K device is functionally tested. Complete testing of each
configurable static random access memory (SRAM) bit and all logic
functionality ensures 100% yield. AC test measurements for APEX 20K
devices are made under conditions equivalent to those shown in
Figure
all stages of the production flow.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 22. APEX 20K JTAG Timing Parameters & Values
Application Note 39 (IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing in
Altera Devices)
Jam Programming & Test Language Specification
32. Multiple test patterns can be used to configure devices during
shows the JTAG timing parameters and values for APEX 20K
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
Parameter
Altera Corporation
Min
100
50
50
20
45
20
45
Max
25
25
25
35
35
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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