AD9865BCPRL Analog Devices Inc, AD9865BCPRL Datasheet - Page 45
AD9865BCPRL
Manufacturer Part Number
AD9865BCPRL
Description
IC FRONT-END MIXED-SGNL 64-LFCSP
Manufacturer
Analog Devices Inc
Datasheet
1.AD9865-EB.pdf
(48 pages)
Specifications of AD9865BCPRL
Rohs Status
RoHS non-compliant
Rf Type
HPNA, VDSL
Features
10-bit ADC(s), 10-bit DAC(s)
Package / Case
64-VFQFN, CSP Exposed Pad
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occur during undershoot or overshoot caused by ringing. If the
signal traces cannot be kept shorter than about 1.5 inches, series
termination resistors (33 Ω to 47 Ω) should be placed close to
all digital signal sources. It is a good idea to series-terminate all
clock signals at their source, regardless of trace length.
The receive RX+ and RX− signals are the most sensitive signals
on the entire board. Careful routing of these signals is essential
for good receive path performance. The RX+ and RX− signals
Rev. A | Page 45 of 48
form a differential pair and should be routed together as a pair.
By keeping the traces adjacent to each other, noise coupled onto
the signals appears as common mode and is largely rejected by
the MxFE receive input. Keeping the driving point impedance
of the receive signal low and placing any low-pass filtering of
the signals close to the MxFE further reduces the possibility of
noise corrupting these signals.
AD9865
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