CY2SSTV857ZXC-27 Silicon Laboratories Inc, CY2SSTV857ZXC-27 Datasheet

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CY2SSTV857ZXC-27

Manufacturer Part Number
CY2SSTV857ZXC-27
Description
Clock Buffer 2.5V 60-200MHz 1:10 Diff DDR266/333 B/D
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY2SSTV857ZXC-27

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Rev 1.0, November 21, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Features
• Operating frequency: 60 MHz to 200 MHz
• Supports 266, 333 MHz DDR SDRAM
• 10 differential outputs from 1 differential input
• Spread-Spectrum-compatible
• Low jitter (cycle-to-cycle): < 75
• Very low skew: < 100 ps
• Power management control input
• High-impedance outputs when input clock < 10 MHz
• 2.5V operation
• Pin-compatible with CDC857-2 and -3
• 48-pin TSSOP package
• Industrial temp. of –40° to +85° C
• Conforms to JEDEC DDR specification
Block Diagram
A V D D
F B IN #
C LK #
C LK
F B IN
P D #
Differential Clock Buffer/Driver DDR333/PC2700-Compliant
3 7
1 6
3 6
3 5
1 3
1 4
P ow erdo w n
T es t a nd
P LL
L ogic
Tel:(408) 855-0555
1 0
2 0
1 9
2 2
2 3
4 6
4 7
4 4
4 3
3 9
4 0
2 9
3 0
2 7
2 6
3 2
3 3
3
2
5
6
9
Description
The CY2SSTV857-27 is a high-performance, low-skew,
low-jitter zero-delay buffer designed to distribute differential
clocks in high-speed applications. The CY2SSTV857-27
generates ten differential pair clock outputs from one differ-
ential pair clock input. In addition, the CY2SSTV857-27
features differential feedback clock outputs and inputs. This
allows the CY2SSTV857-27 to be used as a zero-delay buffer.
When used as a zero-delay buffer in nested clock trees, the
CY2SSTV857-27 locks onto the input reference and translates
with near-zero delay to low-skew outputs.
Y 2
Y 2#
Y 3
Y 3#
Y 4
Y 4#
Y 5
Y 5#
Y 6
Y 6#
Y 7
Y 7#
Y 8
Y 8#
Y 9
Y 9#
Y 0
Y 0#
Y 1
Y 1#
F B O U T
F B O U T #
Pin Configuration
Fax:(408) 855-0550
V D D Q
V D D Q
V D D Q
V D D Q
V D D Q
A V D D
A V S S
C L K #
V S S
V S S
V S S
V S S
V S S
C L K
Y 0 #
Y 1 #
Y 2 #
Y 3 #
Y 4 #
Y 0
Y 1
Y 2
Y 3
Y 4
CY2SSTV857-27
1
2
3
4
5
6
7
8
9
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
www.SpectraLinear.com
4 8
4 7
4 6
4 5
4 4
4 3
4 2
4 1
4 0
3 9
3 8
3 7
3 6
3 5
3 4
3 3
3 2
3 1
3 0
2 9
2 8
2 7
2 6
2 5
Page 1 of 8
P D #
V D D Q
Y 5
Y 6
Y 7
Y 8
Y 9
V S S
Y 5 #
Y 6 #
V S S
V S S
Y 7 #
F B IN
V S S
Y 8 #
Y 9 #
V S S
V D D Q
V D D Q
F B IN #
F B O U T #
F B O U T
V D D Q

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CY2SSTV857ZXC-27 Summary of contents

Page 1

Differential Clock Buffer/Driver DDR333/PC2700-Compliant Features • Operating frequency: 60 MHz to 200 MHz • Supports 266, 333 MHz DDR SDRAM • 10 differential outputs from 1 differential input • Spread-Spectrum-compatible • Low jitter (cycle-to-cycle): < 75 • Very low skew: ...

Page 2

Pin Description Pin Number Pin Name I/O 13, 14 CLK, CLK# 35 FBIN# 36 FBIN 3, 5, 10, 20, 22 Y(0: 19, 23 Y#(0:4) O 27, 29, 39, 44, 46 Y(9:5) O 26, 30, 40, 43, ...

Page 3

Table 1. Function Table Inputs AVDD PD# CLK GND H L GND 2. 2. 2.5V H < 10 MHz CLKIN FBIN FBOUT CLKIN Yx or ...

Page 4

Yx DDR _SDRAM represents a capacitive load CLK 120 Ohm CLK# 120 Ohm Output load capacitance for 2 DDR-SDRAM Loads: 5 pF< CL< DDR-SDRAM represents a capacitive load CLK 120 Ohm CLK# 120 Ohm Output load capacitancce for ...

Page 5

Figure 6. Differential Signal Using Direct Termination Resistor Rev 1.0, November 21, 2006 ...

Page 6

Absolute Maximum Conditions Input Voltage Relative to V :............................... V SS Input Voltage Relative DDQ DD Storage Temperature: ................................ –65° 150° C Operating Temperature:.................................... 0° +85° C Maximum Power Supply: ................................................ ...

Page 7

AC Electrical Specifications (AV Parameter Description [12 Output Enable Time PZL PZH (all outputs) [12 Output Disable Time PLZ PHZ (all outputs) [10] t Cycle to Cycle Jitter CCJ [10, 13] tjit(h-per) Half-period jitter ...

Page 8

... TSSOP–Tape and Reel CY2SSTV857ZI-27 48-pin TSSOP CY2SSTV857ZI-27T 48-pin TSSOP–Tape and Reel Lead-Free CY2SSTV857ZXC-27 48-pin TSSOP CY2SSTV857ZXC-27T 48-pin TSSOP–Tape and Reel CY2SSTV857ZXI-27 48-pin TSSOP CY2SSTV857ZXI-27T 48-pin TSSOP–Tape and Reel Package Drawing and Dimension 48-lead Thin Shrunk Small Outline Package, Type mm) Z48 While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc ...

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