CY2SSTV857ZXC-27 Silicon Laboratories Inc, CY2SSTV857ZXC-27 Datasheet - Page 7

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CY2SSTV857ZXC-27

Manufacturer Part Number
CY2SSTV857ZXC-27
Description
Clock Buffer 2.5V 60-200MHz 1:10 Diff DDR266/333 B/D
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY2SSTV857ZXC-27

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Rev 1.0, November 21, 2006
AC Electrical Specifications
t
t
t
t
t
t
t
Notes:
12. Refers to transition of non-inverting output.
13. Period jitter and half-period jitter specifications are separate specifications that must be met independently of each other.
14. All differential input and output terminals are terminated with 120Ω/16 pF, as shown in Figure 5.
PZL
PLZ
CCJ
tjit(h-per)
PLH(
PHL(
SK(O)
PHASE
Parameter
, t
, t
t
t
PD)
PD)
PZH
PHZ
Output Enable Time
(all outputs)
Output Disable Time
(all outputs)
Cycle to Cycle Jitter
Half-period jitter
Low-to-High Propagation Delay, CLK to Y
High-to-Low Propagation Delay, CLK to Y
Any Output to Any Output Skew
Phase Error
[14]
[10, 13]
Description
[12]
[12]
[10]
(AV
DD
= V
[14]
DDQ
= 2.5V±5%, T
f > 66 MHz
f > 66 MHz
Test Mode only
A
= 0° C to +85° C)(continued)
Condition
–100
Min.
CY2SSTV857-27
[9, 10]
–75
–50
1.5
1.5
Typ.
3.5
3.5
3
3
Page 7 of 8
Max.
100
100
7.5
7.5
25
75
50
8
Unit
ns
ns
ps
ps
ns
ns
ps
ps

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