MT48LC4M32LFF5-8 IT:G TR Micron Technology Inc, MT48LC4M32LFF5-8 IT:G TR Datasheet - Page 38

• Manufacturer Part Number: MT48LC4M32LFF5-8 IT:G TR
• Description: DRAM Chip Mobile SDRAM 128M-Bit 4Mx32 3.3V 90-Pin VFBGA T/R
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48LC4M32LFF5-8 IT:G TR

• Density: 128 Mb
• Maximum Clock Rate: 125 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Random Access Time: 19|8|7 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (4Mx32)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Package / Case: 90-VFBGA
• Organization: 4Mx32
• Address Bus: 14b
• Access Time (max): 19/8/7ns
• Operating Supply Voltage (typ): 3.3V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 115mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Figure 25:
Figure 26:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
WRITE-to-PRECHARGE
Terminating a WRITE Burst
Notes:
Notes:
COMMAND
COMMAND
1. DQM could remain LOW in this example if the WRITE burst is a fixed length of two.
Fixed-length or full-page WRITE bursts can be truncated with the BURST TERMINATE
command. When truncating a WRITE burst, the input data applied coincident with the
BURST TERMINATE command will be ignored. The last data written (provided that
DQM is LOW at that time) will be the input data applied one clock previous to the
BURST TERMINATE command. This is shown in Figure 26, where data n is the last
desired data element of a longer burst.
COMMAND
1. DQMs are LOW.
t
t
WR@
WR@
ADDRESS
ADDRESS
ADDRESS
TRANSITIONING DATA
DQM
DQM
t
t
CLK
CLK
CK 15ns
CK < 15ns
DQ
DQ
DQ
BANK a,
BANK a,
BANK,
COL n
WRITE
WRITE
WRITE
COL n
COL n
D
D
D
T0
T0
n
n
n
IN
IN
IN
TERMINATE
BURST
n + 1
n + 1
NOP
NOP
T1
D
D
T1
IN
IN
t
WR
DON’T CARE
PRECHARGE
COMMAND
(ADDRESS)
(a or all)
(DATA)
BANK
T2
NOP
T2
NEXT
38
t
WR
TRANSITIONING DATA
PRECHARGE
(a or all)
BANK
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t RP
NOP
NOP
T4
128Mb: x16, x32 Mobile SDRAM
t RP
BANK a,
ACTIVE
ROW
NOP
T5
DON’T CARE
BANK a,
ACTIVE
ROW
NOP
T6
©2001 Micron Technology, Inc. All rights reserved.
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