N25Q128A13BSF40G NUMONYX, N25Q128A13BSF40G Datasheet - Page 83
N25Q128A13BSF40G
Manufacturer Part Number
N25Q128A13BSF40G
Description
SERIAL NOR
Manufacturer
NUMONYX
Datasheet
1.N25Q128A13BSF40G.pdf
(180 pages)
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9.1.5
DQ0
DQ0
DQ1
DQ1
C
S
C
S
Mode 3
Mode 2
Figure 13. Dual Output Fast Read instruction sequence
Dual I/O Fast Read
The Dual I/O Fast Read (DIOFR) instruction is very similar to the Dual Output Fast Read
(DOFR), except that the address bits are shifted in on two pins (pin DQ0 and pin DQ1)
instead of only one.
32 33 34
Dummy cycles
0
35
1
36 37 38 39 40 41 42 43 44 45 46
2
Instruction
High Impedance
3
4
MSB
5
6
7
DATA OUT 1
6
4
5
7
2
3
23 22 21
8
0
1
MSB
9 10
6
7
DATA OUT 2
24-bit address
4
5
2
3
3
28 29 30 31
0
1
47
2
MSB
6
7
DATA OUT 3
1
4
5
0
2
3
0
1
MSB
6
7
DATA OUT n
Dual_Output_Data_Fast_Read
4
5
2
3
0
1
MSB
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