M4-128N/64-15JC LATTICE SEMICONDUCTOR, M4-128N/64-15JC Datasheet - Page 24

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M4-128N/64-15JC

Manufacturer Part Number
M4-128N/64-15JC
Description
CPLD MACH 4 Family 5K Gates 128 Macro Cells 41.7MHz/55.6MHz EECMOS Technology 5V 84-Pin PLCC Tube
Manufacturer
LATTICE SEMICONDUCTOR
Datasheet

Specifications of M4-128N/64-15JC

Package
84PLCC
Family Name
MACH 4
Device System Gates
5000
Number Of Macro Cells
128
Maximum Propagation Delay Time
15 ns
Number Of User I/os
64
Typical Operating Supply Voltage
5 V
Maximum Operating Frequency
41.7|55.6 MHz
Number Of Product Terms Per Macro
20
Re-programmability Support
Yes
Operating Temperature
0 to 70 °C

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Note:
1. Values in parentheses are for the M4(LV)-32/32 and M4(LV)-64/32.
This feature provides high flexibility for partitioning state machines and dual-phase clocks. It
also allows latches to be driven with either polarity of latch enable, and in a master-slave
configuration.
18
Block CLK0
GCLK0
GCLK1
GCLK0
GCLK1
X
X
X
X
Table 12. PAL Block Clock Combinations
Block CLK1
GCLK1
GCLK1
GCLK0
GCLK0
X
X
X
X
MACH 4 Family
GCLK2 (GCLK0)
GCLK3 (GCLK1)
GCLK2 (GCLK0)
GCLK3 (GCLK1)
Block CLK2
X
X
X
X
1
GCLK3 (GCLK1)
GCLK3 (GCLK1)
GCLK2 (GCLK0)
GCLK2 (GCLK0)
Block CLK3
X
X
X
X

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