854054AGLF IDT, Integrated Device Technology Inc, 854054AGLF Datasheet - Page 10

• Manufacturer Part Number: 854054AGLF
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Clock Multiplexerr

Specifications of 854054AGLF

• Number Of Clock Inputs: 4
• Mode Of Operation: Differential
• Output Frequency: 2800MHz
• Output Logic Level: LVDS
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.465V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/LVPECL/SSTL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Compliant

T
854054AG
This section provides information on power dissipation and junction temperature for the ICS854054.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS854054 is the sum of the core power.
The following is the power dissipation for V
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of
the device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
Assuming a moderate air flow of 200 linear feet per minute and a multi-layer board, the appropriate value is 81.8°C/W per
Table 6 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air
flow, and the type of board (single layer or multi-layer).
ABLE
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
q
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.312W * 81.8°C/W = 110.5°C. This is below the limit of 125°C.
JA
A
6. T
= Ambient Temperature
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
= Junction-to-Ambient Thermal Resistance
Power (core)
HERMAL
Integrated
Circuit
Systems, Inc.
R
ESISTANCE
MAX
= V
DD_MAX
JA
FOR
* I
DD_MAX
16-L
JA
P
by Velocity (Linear Feet per Minute)
www.icst.com/products/hiperclocks.html
DD
= 3.465V * 90mA = 311.85mW
JA
EAD
OWER
= 3.3V + 5% = 3.465V, which gives worst case results.
* Pd_total + T
TSSOP, F
C
ORCED
ONSIDERATIONS
A
D
10
IFFERENTIAL
C
137.1°C/W
ONVECTION
89.0°C/W
0
TM
-
TO
devices is 125°C.
118.2°C/W
81.8°C/W
-LVDS C
200
JA
LOCK
must be used.
106.8°C/W
ICS854054
78.1°C/W
500
M
REV. A MARCH 29, 2006
ULTIPLEXER
4:1