854054AGLF IDT, Integrated Device Technology Inc, 854054AGLF Datasheet - Page 8

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854054AGLF

Manufacturer Part Number
854054AGLF
Description
Manufacturer
IDT, Integrated Device Technology Inc
Type
Clock Multiplexerr
Datasheet

Specifications of 854054AGLF

Number Of Clock Inputs
4
Mode Of Operation
Differential
Output Frequency
2800MHz
Output Logic Level
LVDS
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.465V
Package Type
TSSOP
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Signal Type
CML/LVDS/LVPECL/SSTL
Mounting
Surface Mount
Pin Count
16
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
854054AGLF
Manufacturer:
IDT
Quantity:
2 300
854054AG
F
LVPECL C
The PCLK /nPCLK accepts LVPECL, CML, SSTL and other
differential signals. Both V
and V
face examples for the HiPerClockS PCLK/nPCLK input driven
by the most common driver types. The input interfaces sug-
F
F
IGURE
IGURE
IGURE
3.3V
CMR
3.3V
2A. H
2C. H
2E. H
3.3V LVPECL
3.3V
input requirements. Figures 2A to 2E show inter-
LVPECL
CML
R5
100 - 200
BY A
BY A
BY A
LOCK
I
I
I
P
P
P
Integrated
Circuit
Systems, Inc.
ER
ER
ER
Zo = 50 Ohm
Zo = 50 Ohm
3.3V LVPECL D
CML D
3.3V LVPECL D
R6
100 - 200
C
C
C
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
I
LOCK
LOCK
LOCK
NPUT
S PCLK/nPCLK I
S PCLK/nPCLK I
S PCLK/nPCLK I
RIVER
SWING
I
NTERFACE
C1
C2
3.3V
R3
125
3.3V
R1
50
and V
R1
84
3.3V
R3
84
R2
50
R1
125
RIVER WITH
RIVER
R4
125
R2
84
OH
R4
84
PCLK
nPCLK
R2
125
must meet the V
3.3V
www.icst.com/products/hiperclocks.html
CLK
nCLK
NPUT
NPUT
NPUT
3.3V
HiPerClockS
PCLK/nPCLK
PCLK
nPCLK
HiPerClockS
Input
AC C
3.3V
D
D
D
RIVEN
RIVEN
RIVEN
HiPerClockS
PCLK/nPCLK
OUPLE
PP
D
8
F
IFFERENTIAL
F
gested here are examples only. If the driver is from another
vendor, use their termination recommendation. Please con-
sult with the vendor of the driver component to confirm the
driver termination requirements.
IGURE
IGURE
3.3V
2D. H
2B. H
LVDS_Driv er
2.5V
SSTL
BY A
BY AN
I
I
P
P
-
ER
ER
TO
3.3V LVDS D
C
C
Zo = 60 Ohm
Zo = 60 Ohm
SSTL
-LVDS C
LOCK
LOCK
Zo = 50 Ohm
Zo = 50 Ohm
S PCLK/nPCLK I
S PCLK/nPCLK I
IN
D
2.5V
R3
120
RIVER
R1
120
RIVER
LOCK
R4
120
R2
120
R1
100
ICS854054
PCLK
nPCLK
M
3.3V
NPUT
NPUT
REV. A MARCH 29, 2006
ULTIPLEXER
HiPerClockS
PCLK/nPCLK
CLK
nCLK
3.3V
D
D
RIVEN
RIVEN
Receiv er
4:1

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