DP83932CVF25 National Semiconductor, DP83932CVF25 Datasheet - Page 79

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DP83932CVF25

Manufacturer Part Number
DP83932CVF25
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of DP83932CVF25

Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Mounting
Surface Mount
Pin Count
132
Lead Free Status / RoHS Status
Not Compliant
7 0 AC and DC Specifications
MEMORY READ BMODE
Note 1 For successive write operations MRW remains low
Note 2 DSACK0 1 must be synchronized to the bus clock (BSCK) during synchronized mode
Note 3 DS will only be asserted if the bus cycle has at last one wait state inserted
Number
T9
T11a
T11c
T12a
T12c
T13a
T13b
T14
T15a
T16
T17
T19
T22
T23a
T24a
T28
T30
T31
BSCK to Address Valid
BSCK to AS Low
BSCK to ECS Low
BSCK to AS High
BSCK to ECS High
BSCK to DS Low (Note 3)
BSCK to DS High (Note 3)
AS Low Width
AS High Width
Read Data Strobe High Width
Read Data Strobe Low Width
Address Hold Time from AS
Address Valid to AS
Read Data Setup Time to BSCK
Read Data Hold Time from BSCK
BSCK to MRW (Read) Valid (Note 1)
DSACK0 1 Setup to BSCK (Note 2)
DSACK0 1 Hold from BSCK
e
Parameter
1 SYNCHRONOUS MODE (one wait-state shown)
(Continued)
Min
44
45
45
40
18
3
9
5
5
5
9
20 MHz
79
Max
26
17
19
17
19
16
16
26
Min
34
35
35
30
14
3
6
4
5
4
8
25 MHz
Max
24
15
17
15
17
14
14
24
Min
24
25
25
20
10
3
2
3
5
3
7
33 MHz
Max
22
13
15
13
15
12
12
22
TL F 10492 – 64
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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