LMP91000SDE National Semiconductor, LMP91000SDE Datasheet - Page 15

AFE, SENSOR, 14LLP

LMP91000SDE

Manufacturer Part Number
LMP91000SDE
Description
AFE, SENSOR, 14LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of LMP91000SDE

Brief Features
Programmable Cell Bias Voltage, Low Bias Voltage Drift, I2C Compatible Digital Interface
Supply Voltage Range
2.7V To 5.25V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
LLP
Ic Function
Programmable Analogue Front End (AFE)
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
TIACN -- TIA Control Register (address 0x10)
The parameters in the TIA control register allow the configuration of the transimpedance gain (R
(R
REFCN -- Reference Control Register (address 0x11)
The parameters in the Reference control register allow the configuration of the Internal zero, Bias and Reference source. When
the Reference source is external, the reference is provided by a reference voltage connected to the VREF pin. In this condition the
Internal Zero and the Bias voltage are defined as a percentage of VREF voltage instead of the supply voltage.
Load
[7:5]
[4:2]
[1:0]
[6:5]
[3:0]
).
Bit
Bit
7
4
REF_SOURCE
RESERVED
BIAS_SIGN
TIA_GAIN
RLOAD
INT_Z
Name
Name
BIAS
RESERVED
TIA feedback resistance selection
000 External resitance
001 2.75kΩ
010 3.5kΩ
011 7kΩ
100 14kΩ
101 35kΩ
110 120kΩ
111 350kΩ (default)
R
00 10Ω (default)
01 33Ω
10 50Ω
11 100Ω
Reference voltage source selection
0 Internal (default)
1 external
Internal zero selection (Percentage of the source reference)
00 20% (default)
01 50%
10 67%
11 Internal zero circuitry bypassed (only in O
Selection of the Bias polarity
0 Positive (default)
1 Negative
BIAS selection (Percentage of the source reference)
0000 0% (default)
0001 1%
0010 2%
0011 4%
0100 6%
0101 8%
0110 10%
0111 12%
1000 14%
1001 16%
1010 18%
1011 20%
1100 22%
1101 24%
Load
selection
15
Function
Function
2
ground referred measurement)
TIA
) and the load resistance
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