SAA7118E NXP Semiconductors, SAA7118E Datasheet - Page 93

• Manufacturer Part Number: SAA7118E
• Manufacturer: NXP Semiconductors

Specifications of SAA7118E

• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: LBGA
• Pin Count: 156
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 40.
SAA7118_7
Product data sheet
Bit
D[7:6]
CVBS modes 1
D[5:0]
Y + C modes 1
D[5:0]
Description
analog function select; see
Figure 4
mode selection
mode selection
Analog input control 1 (AICO1); 02h[7:0]
10.2.3 Subaddress 02h
and
Figure 6
Symbol
FUSE[1:0]
MODE[5:0]
MODE[5:0]
Rev. 07 — 7 July 2008
[1]
Multistandard video decoder with adaptive comb filter
Value
00
01
10
11
00 0000
00 0001
00 0010
00 0011
00 0100
00 0101
00 0110
00 0111
00 1000
00 1001
00 1010
00 1011
00 1100
00 1101
Function
amplifier plus anti-alias filter bypassed
amplifier plus anti-alias filter bypassed
amplifier active
amplifier plus anti-alias filter active
Mode 00: CVBS (automatic gain) from AI11;
see
Mode 01: CVBS (automatic gain) from AI12;
see
Mode 02: CVBS (automatic gain) from AI21;
see
Mode 03: CVBS (automatic gain) from AI22;
see
Mode 04: CVBS (automatic gain) from AI23;
see
Mode 05: CVBS (automatic gain) from AI24;
see
Mode 06: Y (automatic gain) from AI11 + C
(gain adjustable via GAI28 to GAI20) from
AI21
Mode 07: Y (automatic gain) from AI12 + C
(gain adjustable via GAI28 to GAI20) from
AI22
Mode 08: Y (automatic gain) from AI11 + C
(gain adapted to Y gain) from AI21
see
Mode 09: Y (automatic gain) from AI12 + C
(gain adapted to Y gain) from AI22
see
Mode 0A: Y (automatic gain) from AI13 + C
(gain adjustable via GAI28 to GAI20) from
AI23
Mode 0B: Y (automatic gain) from AI14 + C
(gain adjustable via GAI28 to GAI20) from
AI24
Mode 0C: Y (automatic gain) from AI13 + C
(gain adapted to Y gain) from AI23
see
Mode 0D: Y (automatic gain) from AI14 + C
(gain adapted to Y gain) from AI24
see
Figure 50
Figure 51
Figure 52
Figure 53
Figure 54
Figure 55
Figure 58
Figure 59
Figure 62
Figure 63
[2]
[2]
[2]
[2]
; see
; see
; see
; see
Figure 56
Figure 57
Figure 60
Figure 61
SAA7118
© NXP B.V. 2008. All rights reserved.
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