SGTL5000XNAA3R2 Freescale, SGTL5000XNAA3R2 Datasheet - Page 42

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SGTL5000XNAA3R2

Manufacturer Part Number
SGTL5000XNAA3R2
Description
Manufacturer
Freescale
Datasheet

Specifications of SGTL5000XNAA3R2

Single Supply Voltage (typ)
1.8/2.5/3.3V
Lead Free Status / RoHS Status
Compliant

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contains all of the power down controls for the analog blocks.
The only other powerdown controls are BIAS_RESISTOR in
Table 31. CHIP_ANA_POWER 0x0030
42
SGTL500
FUNCTIONAL DEVICE OPERATION
PROGRAMMING EXAMPLES
BITS
The
15
15
14
13
12
11
10
9
Table 31, CHIP_ANA_POWER 0x0030
LINREG_D_POWERUP
STARTUP_POWERUP
VDDC_CHRGPMP_PO
LINREG_SIMPLE_PO
14
PLL_POWERUP
DAC_MONO
WERUP
WERUP
FIELD
RSVD
13
12
RW
RW
RW
RW
RW
RW
RW
RW
11
RESET
0x0
0x1
0x1
0x1
0x0
0x0
0x0
10
register
Reserved
While DAC_POWERUP is set, this allows the DAC to be put into left only mono
operation for power savings.
0x0 = Mono (left only)
0x1 = Stereo
Power up the simple (low power) digital supply regulator. After reset, this bit can be
cleared IF VDDD is driven externally OR the primary digital linreg is enabled with
LINREG_D_POWERUP
0x0 = Power down
0x1 = Power up
Power up the circuitry needed during the power up ramp and reset. After reset this bit
can be cleared if VDDD is coming from an external source.
0x0 = Power down
0x1 = Power up
Power up the VDDC chargepump block. If neither VDDA or VDDIO is 3.0 V or larger
this bit should be cleared before analog blocks are powered up.
0x0 = Power down
0x1 = Power up
Note that for charge pump to function, either the PLL must be powered on and
programmed correctly (refer to CHIP_CLK_CTRL->MCLK_FREQ description) or the
internal oscillator (set CLK_TOP_CTRL->ENABLE_INT_OSC) must be enabled
PLL Power Up
0x0 = Power down
0x1 = Power up
When cleared, the PLL will be turned off. This must be set before CHIP_CLK_CTRL -
> MCLK_FREQ is programmed to 0x3. The CHIP_PLL_CTRL register must be
configured correctly before setting this bit.
Power up the primary VDDD linear regulator.
0x0 = Power down
0x1 = Power up
9
8
the MIC_CTRL register and the EN_ZCD control bits in
ANA_CTRL.
7
6
5
DEFINITION
Analog Integrated Circuit Device Data
4
3
Freescale Semiconductor
2
1
0

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