MT47H128M16RT-25E:C Micron Technology Inc, MT47H128M16RT-25E:C Datasheet - Page 121

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MT47H128M16RT-25E:C

Manufacturer Part Number
MT47H128M16RT-25E:C
Description
DRAM Chip DDR2 SDRAM 2G-Bit 128Mx16 1.8V 84-Pin FBGA Tray
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Series
-r
Datasheet

Specifications of MT47H128M16RT-25E:C

Package
84FBGA
Density
2 Gb
Address Bus Width
17 Bit
Operating Supply Voltage
1.8 V
Maximum Clock Rate
800 MHz
Maximum Random Access Time
0.4 ns
Operating Temperature
0 to 70 °C
Format - Memory
RAM
Memory Type
DDR2 SDRAM
Memory Size
2G (128M x 16)
Speed
2.5ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.9 V
Package / Case
84-TFBGA
Lead Free Status / RoHS Status
Compliant

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Figure 71: READ-to-Power-Down or Self Refresh Entry
Figure 72: READ with Auto Precharge-to-Power-Down or Self Refresh Entry
PDF: 09005aef824f87b6
2gbddr2.pdf – Rev. E 06/10 EN
DQS, DQS#
Command
DQS, DQS#
Command
Address
Address
CK#
CKE
A10
DQ
CK
CK#
CKE
A10
DQ
CK
Valid
READ
T0
Valid
READ
T0
Notes:
Notes:
NOP
T1
NOP
1. In the example shown, READ burst completes at T5; earliest power-down or self refresh
2. Power-down or self refresh entry may occur after the READ burst completes.
1. In the example shown, READ burst completes at T5; earliest power-down or self refresh
2. Power-down or self refresh entry may occur after the READ burst completes.
T1
RL = 3
entry is at T6.
entry is at T6.
RL = 3
NOP
T2
NOP
T2
NOP
T3
NOP
T3
DO
121
DO
DO
Valid
DO
T4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Valid
DO
T4
DO
DO
2Gb: x4, x8, x16 DDR2 SDRAM
Valid
T5
DO
Valid
T5
Transitioning Data
Power-down 2 or
self refresh entry
Transitioning Data
NOP 1
self refresh 2 entry
Power-down or
Power-Down Mode
T6
© 2006 Micron Technology, Inc. All rights reserved.
NOP 1
T6
t CKE (MIN)
t CKE (MIN)
T7
Don’t Care
Don’t Care
T7

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