MT45W8MW16BGX-856 WT TR Micron Technology Inc, MT45W8MW16BGX-856 WT TR Datasheet - Page 50

MT45W8MW16BGX-856 WT TR

Manufacturer Part Number
MT45W8MW16BGX-856 WT TR
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of MT45W8MW16BGX-856 WT TR

Operating Temperature (max)
85C
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Compliant
Figure 38:
PDF: 09005aef80ec6f79/Source: 09005aef80ec6f65
128mb_burst_cr1_5_p26z__2.fm - Rev. H 9/07 EN
DQ[15:0]
LB#/UB#
A[22:0]
ADV#
WAIT
WE#
OE#
CLK
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
OH
OH
OL
OL
IH
IH
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
IL
IL
Burst READ at End of Row (Wrap Off)
Notes:
t CLK
1. Non-default BCR settings for burst READ at end of row: fixed or variable latency; WAIT
2. For burst READs, CE# must go HIGH before the third CLK after the WAIT period begins
Output
Valid
active LOW; WAIT asserted during delay.
(before the third CLK after WAIT asserts with BCR[8] = 0, or before the fourth CLK after
WAIT asserts with BCR[8] = 1). Micron devices are fully compatible with the CellularRAM
Workgroup specification that requires CE# to go HIGH one cycle sooner than shown here.
t KHTL
128Mb: 8 Meg x 16 Async/Page/Burst CellularRAM 1.5 Async/
Output
Valid
End of Row
t HZ
Note 2
50
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Page/Burst CellularRAM 1.5 Memory
t HZ
High-Z
©2004 Micron Technology, Inc. All rights reserved.
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