MCIMX27MJP4A Freescale, MCIMX27MJP4A Datasheet - Page 30
MCIMX27MJP4A
Manufacturer Part Number
MCIMX27MJP4A
Description
Manufacturer
Freescale
Datasheet
1.MCIMX27MJP4A.pdf
(152 pages)
Specifications of MCIMX27MJP4A
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Signal Descriptions
30
Note: SD3_DATA is multiplexed with ATA_DATA3–0.
UART1_RTS
UART1_CTS
UART1_RXD
UART1_TXD
UART2_RXD
UART2_TXD
UART2_RTS
UART2_CTS
UART3_RTS
UART3_CTS
UART3_RXD
UART3_TXD
Note: UART 4, 5, and 6 are multiplexed with COMS Sensor Interface signals.
KP_COL[5:0]
KP_ROW[5:0]
Note: KP_COL[7:6] and KP_ROW[7:6] are multiplexed with UART2 signals as show above, also see UARTs table.
PWMO
CSPI1_MOSI
CSPI1_MISO
CSPI1_SS[2:0]
CSPI1_SCLK
Pad Name
Table 3. i.MX27/MX27L Signal Descriptions (continued)
Request to Send input signal; PE15
Clear to Send output signal; PE14
Receive Data input signal; PE13
Transmit Data output signal, PE12
Receive Data input signal. This signal is multiplexed with KP_ROW6 signal from KPP; PE7.
Transmit Data output signal. This signal is multiplexed with KP_COL6 signal from KPP; PE6.
Request to Send input signal. This signal is multiplexed with KP_ROW7 signal from KPP; PE4.
Clear to Send output signal. This signal is multiplexed with KP_COL7 signal from KPP; PE3.
Request to Send input signal, PE11
Clear to Send output signal; PE10
Receive Data input signal; PE9
Transmit Data output signal; PE8
Keypad Column selection signals. KP_COL[7:6] are multiplexed with UART2_CTS and
UART2_TXD respectively. Alternatively, KP_COL6 is also available on the internal factory test
signal TEST_WB2. The Function Multiplexing Control Register in the System Control chapter
must be used in conjunction with programming the GPIO multiplexing (to select the alternate
signal multiplexing) to choose which signal KP_COL6 is available.
Keypad Row selection signals. KP_ROW[7:6] are multiplexed with UART2_RTS and
UART2_RXD signals respectively. The Function Multiplexing Control Register in the System
Control chapter must be used in conjunction with programming the GPIO multiplexing (to select
the alternate signal multiplexing) to choose which signals KP_ROW6 and KP_ROW7 are
available.
PWM Output. This signal is multiplexed with PC_SPKOUT of PCMCIA, as well as TOUT2 and
TOUT3 of the General Purpose Timer module; PE5.
Master Out/Slave In signal, PD31
Master In/Slave Out signal, PD30
Slave Select (Selectable polarity) signal, the CSPI1_SS2 is multiplexed with
USBH2_DATA5/RCV; and CSPI1_SS1 is multiplexed with EXT_DMAGRANT; PD26–28.
Serial Clock signal, PD29
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
UARTs (X6)
CSPI (X3)
Keypad
PWM
Function/Notes
Freescale Semiconductor
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