MCIMX27LMOP4A Freescale, MCIMX27LMOP4A Datasheet - Page 34

• Manufacturer Part Number: MCIMX27LMOP4A
• Manufacturer: Freescale

Specifications of MCIMX27LMOP4A

• Lead Free Status / RoHS Status: Compliant

Signal Descriptions
34
LD [17:0]
LSCLK
Note: SLCDC signals are multiplexed with LCDC signals.
ATA_DATA15–0
N
FPM
MPLL
OSC26
UPLL
OSC32
OSC32VSS
FPMVSS
MPLLVSS
OSC26VSS
UPLLVSS
Q
QVSS
FUSE
RTC
RTCVSS
VDD
VDD
VDD
VDD
1–15, A
VDD
VDD
VDD
VDD
VDD
Pad Name
VDD
Table 3. i.MX27/MX27L Signal Descriptions (continued)
LCD Data Bus—All LCD signals are driven low after reset and when LCD is off. Through GPIO,
LD[15:0] signals are multiplexed with SLCDC1_DAT[15:0], SLCDC. PA23–PA6.
Shift Clock; PA5
ATA Data Bus, [15:0] are multiplexed with
ETMTRACEPKT4–12,
FEC_MDIO,
ETMTRACEPKT13–14
SD3_D3–0;
Through GPIO also are multiplexed with SLCDC 15–0, and FEC signals; PF23, PD16–PD2.
Noisy Supply for the I/O pins. There are 16 I/O voltage pads, N
Supply for analog blocks
Quiet GND for analog blocks
GND pins for silicon internal circuitry
For Fuse
For RTC, SCC power supply
For RTC, SCC GND
Power supply pins for silicon internal circuitry
VDD
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
ATA (not available on i.MX27L)
Q
VDD
Noisy I/O Supply Pins
Analog Supply Pins
Internal Power Supply
Function/Notes
VDD
1 through N
Freescale Semiconductor
VDD
15 + A
VDD
.