FDC37C78-HT Standard Microsystems (SMSC), FDC37C78-HT Datasheet - Page 57

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FDC37C78-HT

Manufacturer Part Number
FDC37C78-HT
Description
Manufacturer
Standard Microsystems (SMSC)
Datasheet

Specifications of FDC37C78-HT

Package Type
TQFP
Lead Free Status / RoHS Status
Compliant

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LOCK
In order to protect systems with long DMA
latencies against older application software that
can disable the FIFO the LOCK Command has
been added. This command should only be used
by the FDC routines, and application software
should refrain from using it. If an application calls
for the FIFO to be disabled then the CONFIGURE
command should be used.
The LOCK command defines whether the EFIFO,
FIFOTHR, and PRETRK parameters of the
CONFIGURE command can be RESET by the
DOR and DSR registers. When the LOCK bit is
set to logic "1" all subsequent "software RESETS
by the DOR and DSR registers will not change the
previously set parameters to their default values.
All "hardware" RESET from the RESET pin will set
the LOCK bit to logic "0" and return the EFIFO,
FIFOTHR, and PRETRK to their default values.
A status byte is returned immediately after issuing
a a LOCK command. This byte reflects the value
of the LOCK bit set by the command byte.
57
ENHANCED DUMPREG
The DUMPREG command is designed to support
system run-time diagnostics and application
software
accommodate the LOCK command and the
enhanced PERPENDICULAR MODE command
the eighth byte of the DUMPREG command has
been modified to contain the additional data from
these two commands.
COMPATIBILITY
The FDC37C78 was designed with software
compatibility in mind.
compatible solution with the older generation
765A/B
implements on-board registers for compatibility
with PC/AT and PC/XT floppy disk controller
subsystems. After a hardware reset of the FDC, all
registers, functions and enhancements default to a
PC/AT compatible operating mode.
disk
development
controllers.
It is a fully backwards-
and
The
debug.
FDC
also
To

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