MCIMX31LCVMN4D Freescale, MCIMX31LCVMN4D Datasheet - Page 42

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MCIMX31LCVMN4D

Manufacturer Part Number
MCIMX31LCVMN4D
Description
Manufacturer
Freescale
Datasheet

Specifications of MCIMX31LCVMN4D

Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Lead Free Status / RoHS Status
Compliant

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Electrical Characteristics
42
1
Timing parameters are relevant only to SDR SDRAM. For the specific DDR SDRAM data related timing parameters, see
Table 35
SD10
SD9
ID
and
Active to read/write command period
Data out hold time
Table
SDR SDRAM CLK parameters are being measured from the 50%
point—that is, high is defined as 50% of signal value and low is defined as
50% of signal value. SD1 + SD2 does not exceed 7.5 ns for 133 MHz.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is,
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
Table 31. DDR/SDR SDRAM Read Cycle Timing Parameters (continued)
36.
1
Table 31
MCIMX31C/MCIMX31LC Technical Data, Rev. 4.3
Parameter
indicates SDRAM requirements. All output signals
NOTE
NOTE
Symbol
tOH
tRC
Min
1.8
10
Freescale Semiconductor
Max
clock
Unit
ns

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