AD73322LYRUZ Analog Devices Inc, AD73322LYRUZ Datasheet - Page 30

• Manufacturer Part Number: AD73322LYRUZ
• Manufacturer: Analog Devices Inc

Specifications of AD73322LYRUZ

• Single Supply Voltage (typ): 3V
• Single Supply Voltage (min): 2.7V
• Single Supply Voltage (max): 3.3V
• Package Type: TSSOP
• Lead Free Status / RoHS Status: Compliant

AD73322L
Cascade Operation
Where it is required to configure a cascade of up to eight codecs
(four AD73322L dual codecs), it is necessary to ensure that the
timing of the SE and RESET signals is synchronized at each
device in the cascade. A simple D type flip flop is sufficient to
sync each signal to the master clock MCLK, as in Figure 36.
DSP CONTROL
TO SE
DSP CONTROL
TO RESET
MCLK
MCLK
TMS320C5x
ADSP-218x
DSP
DSP
CLK
CLK
D
D
TFS
DT
SCLK
DR
RFS
FL0
FL1
FSX
DT
CLKX
CLKR
DR
FSR
XF
RESET
74HC74
74HC74
1/2
1/2
Q
Q
SE SIGNAL SYNCHRONIZED
TO MCLK
RESET SIGNAL SYNCHRONIZED
TO MCLK
SDOFS
RESET
SDOFS
RESET
SDIFS
SDIFS
SCLK
SDO
SCLK
SDO
SDI
SE
SDI
SE
AD73322L
AD73322L
CODEC
CODEC
Connection of a cascade of devices to a DSP, as shown in Fig-
ure 37, is no more complicated than connecting a single device.
Instead of connecting the SDO and SDOFS to the DSP’s Rx
port, these are now daisy-chained to the SDI and SDIFS of the
next device in the cascade. The SDO and SDOFS of the final
device in the cascade are connected to the DSP’s Rx port to
complete the cascade. SE and RESET on all devices are fed
from the signals that were synchronized with the MCLK using
the circuit as described above. The SCLK from only one device
need be connected to the DSP’s SCLK input(s) as all devices
will be running at the same SCLK frequency and phase.
Grounding and Layout
Since the analog inputs to the AD73322L are differential, most
of the voltages in the analog modulator are common-mode volt-
ages. The excellent common-mode rejection of the part will
remove common-mode noise on these inputs. The analog and
digital supplies of the AD73322L are independent and separately
pinned out to minimize coupling between analog and digital
sections of the device. The digital filters on the encoder section
will provide rejection of broadband noise on the power supplies,
except at integer multiples of the modulator sampling frequency.
The digital filters also remove noise from the analog inputs
provided the noise source does not saturate the analog modula-
tor. However, because the resolution of the AD73322L’s ADC
is high, and the noise levels from the AD73322L are so low,
care must be taken with regard to grounding and layout.
FL0
ADSP-218x
DSP
FL1
D1
D2
TFS
DT
SCLK
DR
RFS
74HC74
Q1
Q2
SDOFS
SDOFS
SCLK
SDIFS
SCLK
SDIFS
SDO
SDO
SDI
SDI
AD73322L
AD73322L
CODEC
DEVICE 1
DEVICE 2
CODEC
MCLK
MCLK
SE
RESET
SE
RESET