ICS954119DFLF IDT, Integrated Device Technology Inc, ICS954119DFLF Datasheet - Page 8

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ICS954119DFLF

Manufacturer Part Number
ICS954119DFLF
Description
IC TIMING CTRL HUB P4 56-SSOP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS954119DFLF

Input
*
Output
*
Frequency - Max
*
Voltage - Supply
*
Operating Temperature
*
Mounting Type
Surface Mount
Package / Case
*
Frequency-max
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
954119DFLF

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0875—05/24/04
I
I
I
I
I
2
2
2
2
2
C Table: Programmable Skew Control Register
C Table: Output Drive Control Register
C Table: Vendor ID Register
C Table: Byte Count Register
C Table: WD Time Control Register
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Byte 5
Byte 6
Byte 7
Byte 8
Byte 9
Integrated
Circuit
Systems, Inc.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Pin #
Pin #
Pin #
Pin #
Pin #
WD Hard Status
WD Soft Status
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
PCISkw3
PCISkw2
PCISkw1
PCISkw0
WD_SEL
ASYNC1
ASYNC0
WDTCtrl
WD_EN
Name
Name
Name
Name
Name
REF0
VID3
VID2
VID1
VID0
WD2
WD1
WD0
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
WD Hard Alarm Status
Watch Dog Time base
WD Soft Alarm Status
Programming b(7:0)
Watchdog Hard/Soft
Control Function
Control Function
Control Function
Control Function
Control Function
Skew Control (ps)
CPU-PCI 7 Steps
Watchdog Alarm
PCI Async Freq
WD Timer Bit 2
WD Timer Bit 1
WD Timer Bit 0
VENDOR ID
REF0 select
Alarm Select
Byte Count
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Enable
Control
8
Type
Type
Type
Type
Type
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
Writing to this register will configure how many bytes will be read
waits before it goes to alarm mode. Default is 7 X 290ms = 2s.
These bits represent X*290ms (or 1.16S) the watchdog timer
0001:N/A
0010:N/A
0011:N/A
0000:0
290ms Base
00 = PLL1
001 = ICS
Hard only
01 = 33.0
Disable
Normal
Normal
XTAL
0
0
0
0
0
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
back, default is 0F = 15 bytes.
0100:150
0101:N/A
0110:N/A
0111:N/A
Advance Information
1000:300
1001:N/A
1010:N/A
1011:N/A
Hard and Soft
1160ms Base
Fixed PLL
10 = 37.7
11 = 44.0
Enable
Alarm
Alarm
1
1
1
1
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ICS954119
1100:450
1101:600
1110:750
1111:900
PWD
PWD
PWD
PWD
PWD
0
0
0
0
0
0
0
0
1
1
1
1
0
1
0
1
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
0
0
X
X
0
1
1
1

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