SI5368B-C-GQR Silicon Laboratories Inc, SI5368B-C-GQR Datasheet - Page 34

• Manufacturer Part Number: SI5368B-C-GQR
• Description: IC CLK MULTIPLIER ATTEN 100TQFP
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5368B-C-GQR

• Input: *
• Output: *
• Frequency - Max: *
• Voltage - Supply: *
• Operating Temperature: *
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Frequency-max: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si5368
Reset value = 0010 1100
34
Register 19.
Name
Type
Bit
6:5
4:3
2:0
Bit
7
VALTIME [1:0] VALTIME [1:0].
LOCKT [2:0]
FOS_EN
FOS_THR
FOS_EN
R/W
Name
D7
[1:0]
FOS_EN.
Frequency offset enable globally disables FOS. See the individual FOS enables
(FOSx_EN, register 139).
00: FOS disable
01: FOS enabled by FOSx_EN
FOS_THR [1:0].
Frequency Offset at which FOS is declared:
00: ± 11 to 12 ppm Stratum 3/3E compliant, with a Stratum 3/3E used for REFCLK.
01: ± 48 to 49 ppm (SMC).
10: ± 30 ppm SONET Minimum Clock (SMC), with a Stratum 3/3E used for REFCLK.
11: ± 200 ppm
Sets amount of time for input clock to be valid before the associated alarm is removed.
00: 2 ms
01: 100 ms
10: 200 ms
11: 13 seconds
LOCKT [2:0].
Sets retrigger interval for one shot monitoring phase detector output. One shot is trig-
gered by phase slip in DSPLL. Refer to the Family Reference Manual for more details.
000: 106 ms
001: 53 ms
010: 26.5 ms
011: 13.3 ms
100: 6.6 ms
101: 3.3 ms
110: 1.66 ms
111: 833 us
D6
FOS_THR [1:0]
R/W
D5
Preliminary Rev. 0.41
D4
VALTIME [1:0]
R/W
Function
D3
D2
LOCKT [2:0]
R/W
D1
D0