NB6N11SMNG ON Semiconductor, NB6N11SMNG Datasheet

IC BUFFER/XLATOR LVDS 16-QFN

NB6N11SMNG

Manufacturer Part Number
NB6N11SMNG
Description
IC BUFFER/XLATOR LVDS 16-QFN
Manufacturer
ON Semiconductor
Series
AnyLevel™ ECLinPS MAX™r
Type
Fanout Buffer (Distribution), Translatorr
Datasheets

Specifications of NB6N11SMNG

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
CML, LVCMOS, LVDS, LVPECL, LVTTL
Output
LVDS
Frequency - Max
2GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TFQFN Exposed Pad
Frequency-max
2GHz
Number Of Outputs
4
Max Input Freq
>2000 MHz
Propagation Delay (max)
0.47 ns @ 3V to 3.6V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NB6N11SMNG
NB6N11SMNGOS

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NB6N11S
3.3 V 1:2 AnyLevelE Input
to LVDS Fanout Buffer /
Translator
Description
accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL,
or LVDS. These signals will be translated to LVDS and two identical
copies of Clock or Data will be distributed, operating up to 2.0 GHz or
2.5 Gb/s, respectively. As such, the NB6N11S is ideal for SONET,
GigE, Fiber Channel, Backplane and other Clock or Data distribution
applications.
GND + 50 mV to V
termination resistors at the inputs, the NB6N11S is ideal for
translating a variety of differential or single−ended Clock or Data
signals to 350 mV typical LVDS output levels.
SG11 or 7L11M devices and is offered in a small, 3 mm X 3 mm,
16−QFN package. Application notes, models, and support
documentation are available at www.onsemi.com.
performance products.
Features
© Semiconductor Components Industries, LLC, 2009
August, 2009 − Rev. 5
The NB6N11S is a differential 1:2 Clock or Data Receiver and will
The NB6N11S has a wide input common mode range from
The NB6N11S is functionally equivalent to the EP11, LVEP11,
The NB6N11S is a member of the ECLinPS MAX™ family of high
SG Devices
Maximum Input Clock Frequency > 2.0 GHz
Maximum Input Data Rate > 2.5 Gb/s
1 ps Maximum of RMS Clock Jitter
Typically 10 ps of Data Dependent Jitter
380 ps Typical Propagation Delay
120 ps Typical Rise and Fall Times
Functionally Compatible with Existing 3.3 V LVEL, LVEP, EP, and
These are Pb−Free Devices
PRBS 2
Figure 2. Typical Output Waveform at 2.488 Gb/s with
23−1
(V
CC
INPP
− 50 mV. Combined with the 50 W internal
Device DDJ = 10 ps
= 400 mV; Input Signal DDJ = 14 ps)
TIME (58 ps/div)
1
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
V
V
*For additional marking information, refer to
CASE 485G
MN SUFFIX
TD
TD
Application Note AND8002/D.
D
D
(Note: Microdot may be in either location)
QFN−16
1
ORDERING INFORMATION
Figure 1. Logic Diagram
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
http://onsemi.com
Publication Order Number:
1
16
DIAGRAM*
MARKING
ALYW G
NB6N
11S
G
NB6N11S/D
Q0
Q0
Q1
Q1

Related parts for NB6N11SMNG

NB6N11SMNG Summary of contents

Page 1

NB6N11S 3.3 V 1:2 AnyLevelE Input to LVDS Fanout Buffer / Translator Description The NB6N11S is a differential 1:2 Clock or Data Receiver and will accept AnyLevel input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated ...

Page 2

Figure 3. NB6N11S Pinout, 16−pin QFN Table 1. PIN DESCRIPTION Pin Name 1 Q0 LVDS Output 2 Q0 LVDS Output 3 Q1 LVDS Output 4 Q1 LVDS Output ...

Page 3

Table 2. ATTRIBUTES ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 2) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 2. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol ...

Page 4

Table 4. DC CHARACTERISTICS, CLOCK INPUTS, LVDS OUTPUTS Symbol I Power Supply Current (Note 8) CC DIFFERENTIAL INPUTS DRIVEN SINGLE−ENDED (Figures 15, 16, 20, and 22) V Input Threshold Reference Voltage Range (Note Single−ended Input HIGH Voltage ...

Page 5

Table 5. AC CHARACTERISTICS V Symbol Characteristic V Output Voltage Amplitude (@ V OUTPP (Figure 4) f Maximum Operating Data Rate DATA t , Differential Input to Differential Output PLH t Propagation Delay PHL t Duty Cycle Skew (Note 11) ...

Page 6

Figure 5. Typical Phase Noise Plot 311.04 MHz carrier Figure 7. Typical Phase Noise Plot 1.5 GHz carrier The above phase noise plots captured using Agilent E5052A show additive phase noise of the NB6N11S ...

Page 7

Figure 9. Typical Output Waveform at 2.488 Gb/s with PRBS 100 mV; Input Signal DDJ = 14 ps) INPP 1. 1. TDx V TDx Figure 10. Input ...

Page 8

V CC NB6N11S LVPECL TD Driver − 2 GND Figure 11. LVPECL Interface V CC NB6N11S ...

Page 9

... thmin V D GND Figure 22. V Diagram th ORDERING INFORMATION Device NB6N11SMNG QFN−16 NB6N11SMNR2G QFN−16 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ PLH Figure 17. AC Reference Measurement ...

Page 10

... E2 e 3.25 0.128 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 6,362,644. N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81− ...

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