NB6N11SMNG ON Semiconductor, NB6N11SMNG Datasheet - Page 5

IC BUFFER/XLATOR LVDS 16-QFN

NB6N11SMNG

Manufacturer Part Number
NB6N11SMNG
Description
IC BUFFER/XLATOR LVDS 16-QFN
Manufacturer
ON Semiconductor
Series
AnyLevel™ ECLinPS MAX™r
Type
Fanout Buffer (Distribution), Translatorr
Datasheets

Specifications of NB6N11SMNG

Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
Yes/Yes
Input
CML, LVCMOS, LVDS, LVPECL, LVTTL
Output
LVDS
Frequency - Max
2GHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TFQFN Exposed Pad
Frequency-max
2GHz
Number Of Outputs
4
Max Input Freq
>2000 MHz
Propagation Delay (max)
0.47 ns @ 3V to 3.6V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NB6N11SMNG
NB6N11SMNGOS

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Manufacturer
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Price
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Manufacturer:
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ON Semiconductor
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NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
10. Measured by forcing V
11. See Figure 17 differential measurement of t
12. Input voltage swing is a single−ended measurement operating in differential mode.
13. RMS jitter with 50% Duty Cycle clock signal at 750 MHz.
14. Deterministic jitter with input NRZ data at PRBS 2
15. Skew is measured between outputs under identical transition @ 250 MHz.
16. The worst case condition between Q0/Q0 and Q1/Q1 from either D0/D0 or D1/D1, when both outputs have the same transition.
Table 5. AC CHARACTERISTICS
Symbol
V
f
t
t
t
t
V
t
t
DATA
PLH
PHL
SKEW
JITTER
r
f
OUTPP
INPP
“D” and “D” of the receiver. Input edge rates 150 ps (20%−80%).
,
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
Output Voltage Amplitude (@ V
(Figure 4)
Maximum Operating Data Rate
Differential Input to Differential Output
Propagation Delay
Duty Cycle Skew (Note 11)
Within Device Skew (Note 16)
Device−to−Device Skew (Note 15)
RMS Random Clock Jitter (Note 13)
Deterministic Jitter (Note 14)
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 12)
Output Rise/Fall Times @ 250 MHz
(20% − 80%)
INPPmin
400
350
300
250
200
150
100
Characteristic
50
0
Input Clock Frequency (f
with 50% duty cycle clock source and V
0
Figure 4. Output Voltage Amplitude (V
V
CC
INPPmin
= 3.0 V to 3.6 V, GND = 0 V; (Note 10)
f
f
f
DATA
DATA
DATA
skew
0.5
) f
= |t
= 622 Mb/s
= 1.5 Gb/s
= 2.488 Gb/s
f
f
f
f
in
in
in
23
in
in
INPUT CLOCK FREQUENCY (GHz)
PLH
≤ 1.0 GHz
= 1.5 GHz
= 2.0 GHz
= 1.0 GHz
= 1.5 GHz
−1 and K28.5.
http://onsemi.com
− t
1
Q, Q
PHL
in
) and Temperature (@ V
| for a nominal 50% differential clock input waveform @ 250 MHz.
Min
220
200
170
270
100
1.5
70
5
1.5
CC
−40°C
Typ
350
300
270
370
120
2.5
0.5
0.5
30
10
− 1400 mV offset. All loading with an external R
8
5
6
7
V
GND
Max
470
100
170
45
25
20
20
CC
1
1
2
OUTPP
85°C
Min
250
200
170
270
100
1.5
70
) versus
CC
2.5
25°C
= 3.3 V)
Typ
350
300
270
370
120
−40°C
2.5
0.5
0.5
30
10
8
5
6
7
25°C
V
GND
Max
470
100
170
45
25
20
20
CC
1
1
3
Min
250
200
170
270
100
1.5
70
85°C
Typ
350
300
270
370
120
2.5
0.5
0.5
30
10
8
5
6
7
L
= 100 W across
V
GND
Max
470
100
170
45
25
20
20
CC
1
1
Gb/s
Unit
mV
mV
ps
ps
ps
ps

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