ICS85105AGILF IDT, Integrated Device Technology Inc, ICS85105AGILF Datasheet - Page 10

• Manufacturer Part Number: ICS85105AGILF
• Description: IC FANOUT BUFFER HCSL 20-TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of ICS85105AGILF

• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: Yes/Yes
• Input: HCSL, LVCMOS, LVDS, LVHSTL, LVPECL, LVTTL, SSTL
• Output: HCSL
• Frequency - Max: 500MHz
• Voltage - Supply: 2.97 V ~ 3.63 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Frequency-max: 500MHz
• Number Of Clock Inputs: 2
• Output Frequency: 500MHz
• Output Logic Level: HCSL
• Operating Supply Voltage (min): 2.97V
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.63V
• Package Type: TSSOP
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1152; 800-1152-5; 800-1152; 85105AGILF

F
D
The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, HCSL and
other differential signals. Both differential signals must meet
the V
interface examples for the CLK/nCLK input driven by the most
common driver types. The input interfaces suggested here are
F
ICS85105I Data Sheet
F
ICS85105AGI REVISION A MAY 27, 2011
IGURE
IGURE
IGURE
IFFERENTIAL
2.5V
PP
HCSL
3.3V
3C. CLK/nCLK I
3A. CLK/nCLK I
3E. CLK/nCLK I
and V
*Optional – R3 and R4 can be 0
1.8V
LVPECL
LVHSTL
ICS
HiPerClockS
LVHSTL Driver
3.3V LVPECL D
IDT O
3.3V HCSL D
*R3
*R4
CMR
C
input requirements. Figures 3A to 3E show
Zo = 50 Ohm
Zo = 50 Ohm
LOCK
33
33
Zo = 50 Ohm
Zo = 50 Ohm
PEN
E
I
NPUT
Zo = 50
Zo = 50
MITTER
NPUT
NPUT
NPUT
RIVER
R1
50
RIVER
3.3V
R3
125
I
D
D
D
R1
84
NTERFACE
LVHSTL D
R1
50
RIVEN BY A
RIVEN BY AN
RIVEN BY A
R2
50
R4
125
R2
84
CLK
nCLK
R2
50
CLK
nCLK
3.3V
3.3V
RIVER
CLK
nCLK
HiPerClockS
Input
HiPerClockS
Input
3.3V
HiPerClockS
Input
10
LOW SKEW, 1-TO-5, DIFFERENTIAL/LVCMOS-TO-0.7V HCSL FANOUT BUFFER
F
examples only. Please consult with the vendor of the driver
component to confirm the driver termination requirements. For
example in Figure 3A, the input termination applies for IDT open
emitter LVHSTL drivers. If you are using an LVHSTL driver from
another vendor, use their termination
F
IGURE
IGURE
3.3V
3.3V
3B. CLK/nCLK I
LVDS_Driv er
3D. CLK/nCLK I
LVPECL
3.3V LVPECL D
3.3V LVDS D
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
Zo = 50 Ohm
NPUT
NPUT
RIVER
R1
50
R3
50
RIVER
D
D
2011 Integrated Device Technology, Inc.
RIVEN BY A
RIVEN BY A
R2
50
R1
100
CLK
nCLK
3.3V
HiPerClockS
Input
CLK
nCLK
3.3V
Receiv er