NB100LVEP221MNG ON Semiconductor, NB100LVEP221MNG Datasheet

NB100LVEP221MNG

Manufacturer Part Number

NB100LVEP221MNG

Description

IC CLK DVR 1:20 DIFF 52-QFN

Manufacturer

ON Semiconductor

Series

100LVEPr

Type

Fanout Buffer (Distribution), Multiplexerr

Datasheet

1.NB100LVEP221MNRG.pdf (12 pages)

Specifications of NB100LVEP221MNG

Number Of Circuits

Ratio - Input:output

2:20

Differential - Input:output

Yes/Yes

Input

ECL, HSTL, LVPECL

Output

ECL, PECL

Frequency - Max

1GHz

Voltage - Supply

2.375 V ~ 3.8 V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

52-VFQFN Exposed Pad

Frequency-max

1GHz

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

NB100LVEP221MNG

Manufacturer:

ON Semiconductor

Quantity:

230

Company:

Meier Automation Equipment Co., Limited

Part Number:

NB100LVEP221MNG

Manufacturer:

ON/安森美

Quantity:

20 000

Current page: 1 of 12
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NB100LVEP221

2.5V/3.3V 1:20 Differential

HSTL/ECL/PECL Clock Driver

Description

driver, designed with clock distribution in mind, accepting two clock

sources into an input multiplexer. The two clock inputs are differential

ECL/PECL; CLK1/CLK1 can also receive HSTL signal levels. The

LVPECL input signals can be either differential configuration or

single-ended (if the V

Optimal design, layout, and processing minimize skew within a device

and from device to device.

terminated identically into 50 W even if only one output is being used.

If an output pair is unused, both outputs may be left open

(unterminated) without affecting skew.

operated from a positive V

LVEP221 to be used for high performance clock distribution in +3.3 V or

+2.5 V systems. In a PECL environment, series or Thevenin line

terminations are typically used as they require no additional power

supplies. For more information on PECL terminations, designers should

refer to Application Note AND8020/D.

device only. For single- ended LVPECL input conditions, the unused

differential input is connected to V

0.5 mA. When not used, V

LVPECL mode, or V

Features

•

*For additional information on our Pb-Free strategy and soldering details, please

June, 2007 - Rev. 8

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The NB100LVEP221 is a low skew 1-to-20 differential clock

The LVEP221 specifically guarantees low output-to-output skew.

To ensure tightest skew, both sides of differential outputs should be

The NB100LVEP221, as with most other ECL devices, can be

The V

Single- ended CLK input operation is limited to a V

15 ps Typical Output-to-Output Skew

40 ps Typical Device-to- Device Skew

Jitter Less than 2 ps RMS

Maximum Frequency > 1.0 GHz Typical

Thermally Enhanced 52-Lead LQFP and QFN

540 ps Typical Propagation Delay

LVPECL and HSTL Mode Operating Range:

NECL Mode Operating Range:

Q Output will Default Low with Inputs Open or at V

Pin Compatible with Motorola MC100EP221

Pb-Free Packages are Available*

may also rebias AC coupled inputs. When used, decouple V

via a 0.01 mF capacitor and limit current sourcing or sinking to

Output

= 2.375 V to 3.8 V with V

= 0 V with V

pin, an internally generated voltage supply, is available to this

≤ -3.0 V in NECL mode.

= -2.375 V to -3.8 V

output is used).

should be left open.

supply in LVPECL mode. This allows the

= 0 V

as a switching reference voltage.

≥ 3.0 V in

and

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

*For additional marking information, refer to

Application Note AND8002/D.

CASE 485M

CASE 848H

MN SUFFIX

FA SUFFIX

LQFP-52

QFN-52

ORDERING INFORMATION

http://onsemi.com

= Assembly Location

= Wafer Lot

= Year

= Work Week

= Pb-Free Package

Publication Order Number:

NB100LVEP221/D

DIAGRAM*

AWLYYWWG

MARKING

AWLYYWWG

LVEP221

NB100

Related parts for NB100LVEP221MNG

NB100LVEP221MNG Summary of contents

Page 1

... Pin Compatible with Motorola MC100EP221 • Pb-Free Packages are Available* *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2007 June, 2007 - Rev switching reference voltage. ...

Page 2

V CC0 All and V pins must ...

Page 3

VCC0 1 VCC 2 CLKSEL 3 CLK0 4 CLK0 5 VBB 6 7 CLK1 CLK1 8 VEE 9 10 Q19 11 Q19 12 Q18 13 Q18 Table 1. PIN DESCRIPTION PIN FUNCTION CLK0*, CLK0** ECL/PECL Differential Inputs CLK1*, CLK1** ECL/PECL ...

Page 4

Table 3. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, refer ...

Page 5

Table 5. LVPECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single-Ended) (Note Input LOW Voltage (Single-Ended) (Note ...

Page 6

Table 7. LVNECL DC CHARACTERISTICS Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 11 Output LOW Voltage (Note 11 Input HIGH Voltage (Single-Ended Input LOW Voltage (Single-Ended Output ...

Page 7

Table 9. AC CHARACTERISTICS V Symbol Characteristic V Differential Output Voltage Opp (Figure Propagation Delay (Differential Configuration) PLH PHL t Within-Device Skew (Note 15) skew Device-to-Device Skew (Note 16) t Random Clock Jitter (RMS) (Figure 4) JITTER ...

Page 8

Figure 4. Output Voltage ( IHCMR PP Figure 5. LVPECL Differential Input Levels Q Driver Device Q Figure 7. Typical Termination for Output Driver and Device Evaluation (See Application ...

Page 9

Using the thermally enhanced package of the NB100LVEP221 The NB100LVEP221 uses a thermally enhanced 52-lead LQFP package. The package is molded so that a portion of the leadframe is exposed at the surface of the package bottom side. This exposed ...

Page 10

... ORDERING INFORMATION Device NB100LVEP221FA NB100LVEP221FAG NB100LVEP221FAR2 NB100LVEP221FARG NB100LVEP221MNG NB100LVEP221MNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Resource Reference of Application Notes AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D ...

Page 11

SCALE 1:1 M M - A/2 A DETAIL AH - SEATING PLANE 0.08 (0.003 EXPOSED PAD ...

Page 12

... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada ...

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