ADF4206BRU Analog Devices Inc, ADF4206BRU Datasheet

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ADF4206BRU

Manufacturer Part Number
ADF4206BRU
Description
IC PLL FREQ SYNTHESIZER 16-TSSOP
Manufacturer
Analog Devices Inc
Type
Clock/Frequency Synthesizer (RF)r
Datasheet

Specifications of ADF4206BRU

Rohs Status
RoHS non-compliant
Pll
Yes
Input
CMOS
Output
Clock
Number Of Circuits
1
Ratio - Input:output
3:1
Differential - Input:output
Yes/No
Frequency - Max
550MHz
Divider/multiplier
No/No
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-TSSOP
Frequency-max
550MHz

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FEATURES
ADF4206: 550 MHz/550 MHz
ADF4208: 2.0 GHz/1.1 GHz
2.7 V to 5.5 V power supply
Selectable charge pump supply (V
Selectable charge pump currents
On-chip oscillator circuit
Selectable dual modulus prescaler
3-wire serial interface
Power-down mode
APPLICATIONS
Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
Base stations for wireless radio (GSM, PCS, DCS,
Wireless LANS
Communications test equipment
CATV equipment
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
tuning voltage in 3 V systems
RF2: 32/33 or 64/65
RF1: 32/33 or 64/65
CDMA, WCDMA)
OSC
RF2
RF2
RF1
RF1
OSC
DATA
CLK
OUT
IN
IN
IN
LE
IN
A
IN
B
A
B
P
) allows extended
OSCILLATOR
REGISTER
22-BIT
DATA
N = BP + A
N = BP + A
PRESCALER
PRESCALER
RF2
RF1
SDOUT
FUNCTIONAL BLOCK DIAGRAM
DGND
V
DD
1
RF1
Dual RF PLL Frequency Synthesizers
B-COUNTER
A-COUNTER
B-COUNTER
11-BIT RF2
A-COUNTER
11-BIT RF1
AGND
6-BIT RF2
6-BIT RF1
V
R-COUNTER
R-COUNTER
14-BIT RF1
14-BIT RF2
DD
2
RF1
Figure 1.
DGND
V
P
1
RF2
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
GENERAL DESCRIPTION
The ADF420x family of dual frequency synthesizers are used
to implement local oscillators in the upconversion and down-
conversion sections of wireless receivers and transmitters. Each
synthesizer consists of a low noise, digital, phase frequency detector
(PFD); a precision charge pump; a programmable reference
divider; programmable A and B counters; and a dual modulus
prescaler (P/P + 1). The A (6-bit) and B (11-bit) counters, in
conjunction with the dual modulus prescaler (P/P + 1), implement
an N divider (N = BP + A). In addition, the 14-bit reference
counter (R counter) allows selectable REFIN frequencies at the
PFD input. The on-chip oscillator circuitry allows the reference
input to be derived from crystal oscillators.
A complete phase-locked loop (PLL) can be implemented if the
synthesizers are used with an external loop filter and voltage
controlled oscillators (VCOs).
Control of all the on-chip registers is via a simple 3-wire
interface. The devices operate with a power supply ranging
from 2.7 V to 5.5 V and can be powered down when not in use.
COMPARATOR
COMPARATOR
AGND
V
PHASE
P
PHASE
2
RF2
OUTPUT
DETECT
DETECT
LOCK
LOCK
ADF4206/ADF4208
MUX
RF2
RF1
CHARGE
CHARGE
PUMP
PUMP
©2006 Analog Devices, Inc. All rights reserved.
ADF4206/ADF4208
CP
MUXOUT
CP
RF2
RF1
www.analog.com

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ADF4206BRU Summary of contents

Page 1

FEATURES ADF4206: 550 MHz/550 MHz ADF4208: 2.0 GHz/1.1 GHz 2 5.5 V power supply Selectable charge pump supply (V ) allows extended P tuning voltage systems Selectable charge pump currents On-chip oscillator circuit Selectable dual ...

Page 2

ADF4206/ADF4208 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Timing Diagram ........................................................................... 5 Absolute Maximum Ratings............................................................ 6 Transistor Count........................................................................... 6 ESD ...

Page 3

SPECIFICATIONS ± 10 ± 10 unless otherwise noted; dBm referred to 50 Ω. A MIN MAX Table 1. Parameter RF/IF CHARACTERISTICS ...

Page 4

ADF4206/ADF4208 Parameter POWER SUPPLIES ADF4206 ADF4208 ADF4206 ADF4208 ADF4206 ADF4208 ...

Page 5

TIMING SPECIFICATIONS ± 10 ± 10 unless otherwise noted; dBm referred to 50 Ω. A MIN MAX Table 2. 1 Parameter ...

Page 6

ADF4206/ADF4208 ABSOLUTE MAXIMUM RATINGS 25°C unless otherwise noted. A Table 3. Parameter GND GND ...

Page 7

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RF1 ADF4206 4 DGND RF1 TOP VIEW RF1 5 (Not to Scale) IN OSC 6 IN OSC 7 OUT MUXOUT 8 Figure 3. 16-Lead TSSOP ...

Page 8

ADF4206/ADF4208 TYPICAL PERFORMANCE CHARACTERISTICS FREQ-UNIT PARAM-TYPE DATA-FORMAT KEYWORD GHz FREQ MAGS11 ANGS11 FREQ MAGS11 0.0 0.957111193 –3.130429321 1.35 0.816886959 –51.80711782 0.15 0.963546793 –6.686426265 1.45 0.825983016 –56.20373378 0.25 0.953621785 –11.19913586 1.55 0.791737125 –61.21554647 0.35 0.953757706 –15.35637483 1.65 0.770543186 ...

Page 9

5mA –10 CP PFD FREQUENCY = 200kHz REFERENCE LEVEL = LOOP BANDWIDTH = 35kHz –20 –4.2dBm RES. BANDWIDTH = 1kHz VIDEO BANDWIDTH = 1kHz –30 SWEEP = 2.5 SECONDS AVERAGES = 30 ...

Page 10

ADF4206/ADF4208 –60 –70 –80 –90 –100 –40 – TEMPERATURE (°C) Figure 17. ADF4208 RF1 Reference Spurs vs. Temperature (900 MHz, 200 kHz, 20 kHz) –5 –15 –25 –35 –45 –55 –65 –75 –85 –95 –105 0 1 ...

Page 11

CIRCUIT DESCRIPTION REFERENCE INPUT SECTION The reference input stage is shown in Figure 22. SW1 and SW2 are normally closed switches. SW3 is normally open. When power-down is initiated, SW3 is closed and SW1 and SW2 are opened. Typical recommended ...

Page 12

ADF4206/ADF4208 PHASE FREQUENCY DETECTOR (PFD) AND CHARGE PUMP The PFD takes inputs from the R counter and N counter ( and produces an output proportional to the phase and frequency difference between them. Figure 25 is ...

Page 13

DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 P1 R14 R13 11-BIT B COUNTER DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 P7 P6 B11 B10 DB21 DB20 DB19 DB18 DB17 DB16 ...

Page 14

ADF4206/ADF4208 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 POLARITY 0 NEGATIVE 1 POSITIVE 1.25mA 1 4.375mA P2 CHARGE PUMP OUTPUT 0 NORMAL 1 THREE-STATE P12 P11 FROM RF1 ...

Page 15

B COUNTER DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 P7 P6 B11 B10 ...

Page 16

ADF4206/ADF4208 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 P12 P11 P10 P13 POLARITY 0 NEGATIVE 1 POSITIVE P13 1. 4.375 mA P10 CHARGE PUMP OUTPUT 0 NORMAL 1 THREE-STATE P4 P3 ...

Page 17

B COUNTER DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB21 P16 P14 B11 B10 ...

Page 18

ADF4206/ADF4208 PROGRAM MODES Figure 28 and Figure 30 show how to set up the program modes in the ADF420x family. Three points should be noted: 1. RF2 and RF1 analog lock detect indicate when the PLL is in lock. When ...

Page 19

RF2 Prescaler Value P6 in the RF2 AB counter latch sets the RF2 prescaler value. See Figure 29. RF2 Power-Down P7 in Figure 29 is the power-down bit for the RF2 side. RF SECTION (RF1) Programmable RF1 Reference (R) Counter ...

Page 20

ADF4206/ADF4208 APPLICATIONS SECTION LOCAL OSCILLATOR FOR GSM HANDSET RECEIVER Figure 33 shows the ADF4208 used in a classic superheterodyne receiver to provide the required local oscillators (LOs). In this circuit, the reference input signal is applied to the circuit at ...

Page 21

LOCAL OSCILLATOR FOR WCDMA RECEIVER Figure 33 shows the ADF4208 used to generate the local oscillator frequencies for a wideband CDMA (WCDMA) system. The required RF output range is 1720 MHz to 1780 MHz. The VCO190-1750T meets this requirement. Channel ...

Page 22

ADF4206/ADF4208 INTERFACING The ADF420x family has a simple SPI®-compatible serial inter- face for writing to the device. CLK, DATA, and LE control the data transfer. When LE goes high, the 22 bits clocked into the input register on each rising ...

Page 23

OUTLINE DIMENSIONS 0.15 0.05 COPLANARITY 5.10 5.00 4. 4.50 6.40 4.40 BSC 4. PIN 1 1.20 MAX 0.20 0.09 0.30 0.65 0.19 SEATING BSC PLANE COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-153-AB Figure 36. 16-Lead Thin ...

Page 24

... ADF4206BRU −40°C to +85°C ADF4206BRU-REEL −40°C to +85°C ADF4206BRU-REEL7 −40°C to +85°C 1 ADF4206BRUZ −40°C to +85°C 1 ADF4206BRUZ-RL −40°C to +85°C 1 ADF4206BRUZ-R7 −40°C to +85°C ADF4208BRU −40°C to +85°C ADF4208BRU-REEL −40°C to +85°C ADF4208BRU-REEL7 − ...

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