ADF4206BRU Analog Devices Inc, ADF4206BRU Datasheet - Page 18

• Manufacturer Part Number: ADF4206BRU
• Description: IC PLL FREQ SYNTHESIZER 16-TSSOP
• Manufacturer: Analog Devices Inc
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of ADF4206BRU

• Rohs Status: RoHS non-compliant
• Pll: Yes
• Input: CMOS
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 3:1
• Differential - Input:output: Yes/No
• Frequency - Max: 550MHz
• Divider/multiplier: No/No
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Frequency-max: 550MHz

ADF4206/ADF4208
PROGRAM MODES
Figure 28 and Figure 30 show how to set up the program modes
in the ADF420x family. Three points should be noted:
1.
2.
3.
POWER-DOWN
It is possible to program the ADF420x family for either
synchronous or asynchronous power-down on either the RF2
or RF1 side.
Synchronous RF2 Power-Down
Programming a 1 to P7 of the ADF420x family initiates a
power-down. If P2 of the ADF420x family has been set to 0
(normal operation), a synchronous power-down is conducted.
The device automatically puts the charge pump into three-state
and completes the power-down.
Asynchronous RF2 Power-Down
If P2 of the ADF420x family has been set to 1 (three-state the
RF2 charge pump), and P7 is subsequently set to 1, an
asynchronous power-down is conducted. The device enters
power-down on the rising edge of LE latching the 1 to P7 (the
RF2 power-down bit).
Synchronous RF1 Power-Down
Programming a 1 to P16 of the ADF420x family initiates a
power-down. If P10 of the ADF420x family is set to 0 (normal
operation), a synchronous power-down is conducted. The
device automatically puts the charge pump into three-state and
completes the power-down.
RF2 and RF1 analog lock detect indicate when the PLL is
in lock. When the loop is locked and either RF2 or RF1
analog lock detect is selected, the MUXOUT pin shows a
logic high with narrow, low going pulses. When the
RF2/RF1 analog lock detect is chosen, the locked condition
is indicated only when both RF2 and RF1 loops are locked.
The RF2 counter reset mode resets the R and AB counters
in the RF2 section and also puts the RF2 charge pump into
three-state. The RF1 counter reset mode resets the R and
AB counters in the RF1 section and also puts the RF1
charge pump into three-state. The RF2 and RF1 counter
reset mode resets the R and AB counters on both the RF1
and RF2 simultaneously.
Upon removal of the reset bits, the AB counter resumes
counting in close alignment with the R counter (maximum
error is one prescaler output cycle).
The fast lock mode uses MUXOUT to switch a second loop
filter damping resistor to ground during fast lock operation.
Activation of fast lock occurs whenever the RF1 CP gain in
the RF1 reference counter is set to one.
Rev. A | Page 18 of 24
Asynchronous RF1 Power-Down
If P10 of the ADF420x family is set to 1 (three-state the RF1
charge pump), and P16 is subsequently set to 1, an asynchronous
power-down occurs. The device goes into power-down on the
rising edge of LE latching the 1 to P16 (the RF1 power-down bit).
Activation of either synchronous or asynchronous power-down
forces the R and N dividers of the RF2/RF1 loop to their load
state conditions, and the RF2/RF1 input section is debiased to a
high impedance state.
The reference oscillator circuit is only disabled if both the RF2
and RF1 power-downs are set.
The input register and latches remain active and are capable of
loading and latching data during all power-down modes.
The RF2/RF1 section of the devices returns to normal powered
up operation immediately upon LE latching a 0 to the
appropriate power-down bit.
IF SECTION (RF2)
Programmable RF2 Reference (R) Counter
If Control Bit C2 and Control Bit C1 are 0 and 0, the data is
transferred from the input shift register to the 14-bit RF2
R counter. Figure 28 shows the input shift register data format
for the RF2 R counter and the divide ratios that are possible.
RF2 Phase Detector Polarity
P1 sets the RF2 phase detector polarity. When the RF2 VCO
characteristics are positive, this is set to 1. When they are
negative, it is set to 0. See Figure 28.
RF2 Charge Pump Three-State
P2 puts the RF2 charge pump into three-state mode when
programmed to a 1. It is set to 0 for normal operation.
See Figure 28.
RF2 Program Modes
Figure 28 and Figure 30 show how to set up the program modes
in the ADF420x family.
RF2 Charge Pump Currents
Bit P5 programs the current setting for the RF2 charge pump.
See Figure 28.
Programmable RF2 AB Counter
If Control Bit C2 and Control Bit C1 are 0 and 1, the data in the
input register is used to program the RF2 AB counter. The AB
counter is a 6-bit swallow counter (A counter) and an 11-bit
programmable counter (B counter). Figure 29 shows the input
register data format for programming the RF2 AB counter and
the divide ratios that are possible.