ADC102S101CIMM/NOPB National Semiconductor, ADC102S101CIMM/NOPB Datasheet - Page 5

• Manufacturer Part Number: ADC102S101CIMM/NOPB
• Description: IC ADC 10BIT 2CN 1MSPS 8-MSOP
• Manufacturer: National Semiconductor
• Series: PowerWise®r

Specifications of ADC102S101CIMM/NOPB

• Number Of Bits: 10
• Sampling Rate (per Second): 1M
• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 11.4mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• For Use With: ADC102S101EVAL - BOARD EVALUATION FOR ADC102S101
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADC102S101CIMM; ADC102S101CIMMTR

Symbol
ADC102S101 Timing Specifications
The following specifications apply for V
f
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supply (that is, V
mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to two. The Absolute
Maximum Rating specification does not apply to the V
Note 4: The absolute maximum junction temperature (T
junction-to-ambient thermal resistance (θ
for maximum power dissipation listed above will be reached only when the device is operated in a severe fault condition (e.g. when input or output pins are driven
beyond the power supply voltages, or the power supply polarity is reversed). Obviously, such conditions should always be avoided.
Note 5: Human body model is 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is 220 pF discharged through zero ohms
Note 6: Reflow temperature profiles are different for lead-free and non-lead-free packages.
Note 7: Tested limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: This is the frequency range over which the electrical performance is guaranteed. The device is functional over a wider range which is specified under
Operating Ratings.
Note 9: Min/max specification limits are guaranteed by design, test, or statistical analysis.
Note 10: Clock may be either high or low when CS is asserted as long as setup and hold times t
t
t
t
SAMPLE
t
CSU
t
ACC
t
t
CLH
t
DIS
EN
SU
t
CH
CL
H
= 500 ksps to 1 Msps, Boldface limits apply for T
Setup Time SCLK High to CS Falling Edge
Hold time SCLK Low to CS Falling Edge
Delay from CS Until DOUT active
Data Access Time after SCLK Falling Edge
Data Setup Time Prior to SCLK Rising Edge
Data Valid SCLK Hold Time
SCLK High Pulse Width
SCLK Low Pulse Width
CS Rising Edge to DOUT High-Impedance
Parameter
JA
), and the ambient temperature (T
A
= +2.7V to 5.25V, GND = 0V, C
A
pin. The current into the V
J
max) for this device is 150°C. The maximum allowable power dissipation is dictated by T
A
= T
(Note
(Note
Output Falling
Output Rising
A
), and can be calculated using the formula P
5
IN
MIN
< GND or V
A
pin is limited by the Analog Supply Voltage specification.
10)
10)
to T
MAX
L
Conditions
= 50 pF, f
IN
: all other limits T
> V
CSU
V
V
V
V
V
V
V
V
V
V
V
V
A
A
A
A
A
A
A
A
A
A
A
A
A
), the current at that pin should be limited to 10 mA. The 20
and t
= +3.0V
= +5.0V
= +3.0V
= +5.0V
= +3.0V
= +5.0V
= +3.0V
= +5.0V
= +3.0V
= +5.0V
= +3.0V
= +5.0V
SCLK
CLH
are strictly observed.
= 8 MHz to 16 MHz,
A
= 25°C.
0.5 x t
0.5 x t
D
Typical
MAX = (T
+16.5
−3.5
−0.5
+4.5
+1.5
+15
1.7
1.2
+4
+2
+3
+3
1
1
SCLK
SCLK
J
max − T
0.3 x t
0.3 x t
(Note
Limits
10
10
30
30
10
10
20
A
)/θ
SCLK
SCLK
www.national.com
7)
JA
J
max, the
. The values
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
Units