MAX11612EUA+ Maxim Integrated Products, MAX11612EUA+ Datasheet - Page 12

• Manufacturer Part Number: MAX11612EUA+
• Description: IC ADC SERIAL 12BIT 4CH 8-MSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX11612EUA+

• Number Of Bits: 12
• Sampling Rate (per Second): 94.4k
• Data Interface: I²C, Serial
• Number Of Converters: 1
• Power Dissipation (max): 362mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Resolution: 12 bit
• Interface Type: I2C
• Snr: 70 dB
• Voltage Reference: 4.096 V
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.5 V
• Maximum Power Dissipation: 470.6 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Input Voltage: 5 V
• Minimum Operating Temperature: - 40 C
• For Use With: MAXSPCSPARTAN6+ - ADC and DAC Eval Expansion Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Power, 4-/8-/12-Channel, I
12-Bit ADCs in Ultra-Small Packages
A bus master initiates communication with a slave device
by issuing a START condition followed by a slave
address. When idle, the MAX11612–MAX11617 continu-
ously wait for a START condition followed by their slave
address. When the MAX11612–MAX11617 recognize
their slave address, they are ready to accept or send
data. See the Ordering Information for the factory pro-
grammed slave address of the selected device. The
least significant bit (LSB) of the address byte (R/W)
determines whether the master is writing to or reading
from the MAX11612–MAX11617 (R/W = 0 selects a write
condition, R/W = 1 selects a read condition). After
receiving the address, the MAX11612–MAX11617
(slave) issues an acknowledge by pulling SDA low for
one clock cycle.
Figure 7. MAX11612/MAX11613 Slave Address Byte
12
Figure 8. F/S-Mode to HS-Mode Transfer
______________________________________________________________________________________
SDA
SCL
S
SDA
SCL
SEE ORDERING INFORMATION FOR SLAVE ADDRESS OPTIONS AND DETAILS.
0
S
MAX11612/MAX11613
0
0
1
1
0
2
HS-MODE MASTER CODE
Slave Address
1
0
3
SLAVE ADDRESS
F/S MODE
0
1
4
1
X
5
At power-up, the MAX11612–MAX11617 bus timing is
set for fast-mode (F/S mode), which allows conversion
rates up to 22.2ksps. The MAX11612–MAX11617 must
operate in high-speed mode (HS mode) to achieve con-
version rates up to 94.4ksps. Figure 1 shows the bus tim-
ing for the MAX11612–MAX11617’s 2-wire interface.
At power-up, the MAX11612–MAX11617 bus timing is
set for F/S mode. The bus master selects HS mode by
addressing all devices on the bus with the HS-mode
master code 0000 1XXX (X = don’t care). After success-
fully receiving the HS-mode master code, the
MAX11612–MAX11617 issue a not-acknowledge, allow-
ing SDA to be pulled high for one clock cycle (Figure 8).
After the not-acknowledge, the MAX11612–MAX11617
are in HS mode. The bus master must then send a
repeated START followed by a slave address to initiate
HS mode communication. If the master generates a
STOP condition, the MAX11612–MAX11617 return to
F/S mode.
0
X
6
2
0
X
7
C,
R/W
A
8
A
9
Sr
HS MODE
Bus Timing
HS Mode