MAX128BCAI+ Maxim Integrated Products, MAX128BCAI+ Datasheet - Page 14

IC DAS 12BIT 2-WIRE 28-SSOP

MAX128BCAI+

Manufacturer Part Number
MAX128BCAI+
Description
IC DAS 12BIT 2-WIRE 28-SSOP
Manufacturer
Maxim Integrated Products
Type
Data Acquisition System (DAS)r
Datasheet

Specifications of MAX128BCAI+

Resolution (bits)
12 b
Sampling Rate (per Second)
8k
Data Interface
Serial
Voltage Supply Source
Single Supply
Voltage - Supply
4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Multirange, +5V, 12-Bit DAS with
2-Wire Serial Interface
Figure 11a. Internal Reference
Figure 11b. External Reference, Reference at REF
Figure 11c. External Reference, Reference at REFADJ
14
______________________________________________________________________________________
MAX127
MAX128
MAX127
MAX128
MAX127
MAX128
2.5V
2.5V
2.5V
10k
A
10k
10k
A
V
A
V
V
= 1.638
= 1.638
= 1.638
REFADJ
REFADJ
REFADJ
REF
REF
REF
C
4.7 F
C
4.7 F
0.01 F
REF
V
C
4.7 F
0.01 F
REF
DD
REF
4.096V
2.5V
To power-up from a software initiated power-down, a
START condition followed by the correct slave address
must be received (with R/W = 0). The MAX127/MAX128
power-up after receiving the next bit.
For hardware-controlled power-down (FULLPD), pull
SHDN low. When hardware shutdown is asserted, it
becomes effective immediately and any conversion in
progress is aborted.
The bandgap reference and reference buffer remain
active in STBYPD mode, maintaining the voltage on the
4.7µF capacitor at REF. This is a “DC” state that does
not degrade after standby power-down of any duration.
In FULLPD mode, only the bandgap reference is active.
Connect a 33µF capacitor between REF and AGND to
maintain the reference voltage between conversions
and to reduce transients when the buffer is enabled
and disabled. Throughput rates down to 1ksps can be
achieved without allotting extra acquisition time for ref-
erence recovery prior to conversion. This allows con-
version to begin immediately after power-down ends. If
the discharge of the REF capacitor during FULLPD
exceeds the desired limits for accuracy (less than a
fraction of an LSB), run a STBYPD power-down cycle
prior to starting conversions. Take into account that the
reference buffer recharges the bypass capacitor at an
80mV/ms slew rate, and add 50µs for settling time.
Selecting STBYPD on every conversion automatically
shuts the MAX127/MAX128 down after each conversion
without requiring any start-up time on the next conversion.
Figure 12. Reference-Adjust Circuit
100k
24k
+5V
510k
Choosing Power-Down Modes
0.01 F
REFADJ
MAX127
MAX128
Auto-Shutdown

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