AD7226KRZ Analog Devices Inc, AD7226KRZ Datasheet - Page 4

IC DAC 8BIT LC2MOS QUAD 20-SOIC

AD7226KRZ

Manufacturer Part Number
AD7226KRZ
Description
IC DAC 8BIT LC2MOS QUAD 20-SOIC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7226KRZ

Data Interface
Parallel
Settling Time
4µs
Number Of Bits
8
Number Of Converters
4
Voltage Supply Source
Dual ±
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Resolution (bits)
8bit
Sampling Rate
143kSPS
Input Channel Type
Parallel
Supply Current
13mA
Digital Ic Case Style
SOIC
No. Of Pins
20
Number Of Channels
4
Resolution
8b
Conversion Rate
143KSPS
Interface Type
Parallel
Single Supply Voltage (typ)
15V
Dual Supply Voltage (typ)
-5/12/-5/15V
Architecture
R-2R
Power Supply Requirement
Single/Dual
Output Type
Voltage
Integral Nonlinearity Error
±0.5LSB
Single Supply Voltage (min)
14.25V
Single Supply Voltage (max)
15.75V
Dual Supply Voltage (min)
-4.5/11.4V
Dual Supply Voltage (max)
-5.5/16.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
SOIC W
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
Lead Free Status / Rohs Status
Compliant

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AD7226
TERMINOLOGY
TOTAL UNADJUSTED ERROR
This is a comprehensive specification that includes full-scale
error, relative accuracy and zero code error. Maximum output
voltage is V
256. The LSB size will vary over the V
code error will, relative to the LSB size, increase as V
Accordingly, the total unadjusted error, which includes the zero
code error, will also vary in terms of LSB’s over the V
As a result, total unadjusted error is specified for a fixed refer-
ence voltage of 10 V.
RELATIVE ACCURACY
Relative Accuracy or endpoint nonlinearity, is a measure of the
maximum deviation from a straight line passing through the
endpoints of the DAC transfer function. It is measured after
allowing for zero and full-scale error and is normally expressed
in LSB’s or as a percentage of full-scale reading.
REF
– 1 LSB (ideal), where 1 LSB (ideal) is V
REF
range. Hence the zero
DB7 (MSB)
DB7 (MSB)
AGND
DGND
REF
V
DB8
REF
PIN CONFIGURATIONS
V
V
REF
AGND
DGND
decreases.
OUT
OUT
V
DB6
DB5
DB4
DIP and SOIC/SSOP
V
REF
4
5
6
7
8
SS
REF
B
A
range.
10
1
2
3
4
5
6
7
8
9
/
9
3
(Not to Scale)
(Not to Scale)
TOP VIEW
TOP VIEW
10
AD7226
PLCC
2
AD7226
–4–
11
1
12
DIFFERENTIAL NONLINEARITY
Differential Nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ± 1 LSB max over
the operating temperature range ensures monotonicity.
DIGITAL CROSSTALK
The glitch impulse transferred to the output of one converter
due to a change in the digital input code to another of the con-
verters. It is specified in nV secs and is measured at V
FULL SCALE ERROR
Full-Scale Error is defined as:
20
Measured Value – Zero Code Error – Ideal Value
20
19
18
17
16
15
14
13
12
11
19
13
V
V
V
A0
A1
WR
DB0(LSB)
DB1
DB2
DB3
OUT
OUT
DD
18
17
16
15
14
C
D
A0
A1
WR
DB0(LSB)
V
DD
REF
REV.
= 0 V.
D

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