ISP1181BBS,557 NXP Semiconductors, ISP1181BBS,557 Datasheet - Page 21
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ISP1181BBS,557
Manufacturer Part Number
ISP1181BBS,557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.ISP1181BBS557.pdf
(73 pages)
Specifications of ISP1181BBS,557
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant
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11. Suspend and resume
ISP1181B_3
Product data sheet
11.1 Suspend conditions
The ISP1181B detects a USB suspend status when a constant idle state is present on the
USB bus for more than 3 ms.
The bus-powered devices that are suspended must not consume more than 500 A of
current. This is achieved by shutting down power to system components or supplying
them with a reduced voltage.
The steps leading up to suspend status are as follows:
Figure 6
1. On detecting a wake-up-to-suspend transition, the ISP1181B sets bit SUSPND in the
2. When the firmware detects a suspend condition, it must prepare all system
3. In the interrupt service routine, the firmware must check the current status of the USB
4. To meet the suspend current requirements for a bus-powered device, the internal
5. When the firmware has set and cleared bit GOSUSP in the Mode register, the
Interrupt register. This will generate an interrupt if bit IESUSP in the Interrupt Enable
register is set.
components for the suspend state:
a. All signals connected to the ISP1181B must enter appropriate states to meet the
b. All input pins of the ISP1181B must have a CMOS LOW or HIGH level.
bus. When bit BUSTATUS in the Interrupt register is logic 0, the USB bus has left the
suspend mode and the process must be aborted. Otherwise, the next step can be
executed.
clocks must be switched off by clearing bit CLKRUN in the Hardware Configuration
register.
ISP1181B enters the suspend state. In powered-off application, the ISP1181B asserts
output SUSPEND and switches off the internal clocks after 2 ms.
power consumption requirements of the suspend state.
shows a typical timing diagram.
Rev. 03 — 23 January 2009
Full-speed USB peripheral controller
© ST-NXP Wireless 2009. All rights reserved.
ISP1181B
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