GD16334100BA Intel, GD16334100BA Datasheet

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GD16334100BA

Manufacturer Part Number
GD16334100BA
Description
Manufacturer
Intel
Datasheet

Specifications of GD16334100BA

Operating Temperature (max)
85C
Pin Count
100
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
General Description
GD16334 is a 32:4 multiplexer, intended
for use with the GD16255, an STM-64
16:1 mutliplexer with PLL or in DSP ap-
plications with fast DAC’s.
The GD16334 consists of:
u
u
u
The synchronisation circuit, enables a
parallel coupling of several devices. This
is done with a master clock divider, which
distributes a synchronisation signal to the
parallel devices.
four 8:1 multiplexers
a clock generator circuit
a synchronisation circuit
I0, I4 … I28
I1, I5 … I29
I2, I6 … I30
I3, I7 … I31
SYNCN
SYNC
FCKN
CLKN
SEL1
SEL2
FCK
CLK
Div. 2 / 4 / 8
Phase
Div. 8
The GD16334 is provided in a 100 pin
power enhanced plastic package.
The chip is designed for operation be-
tween -5 C and +85 C (case tempera-
ture).
O0
O0N
O1
O1N
O2
O2N
O3
O3N
TSTR
VCS
VEE
VDD
VDDC
CKO
SYNCON
SYNCO
FCKO
FCKON
622 MHz
32:4 Multiplexer
GD16334
Preliminary
Features
l
l
l
l
l
l
l
l
l
Applications
l
l
Clock frequency to 622 MHz.
32:4 MUX, obtained by four
8:1 synchronised MUX’es.
High speed differential inputs,
CML/PECL level.
High speed differential CML outputs.
Low speed inputs are CMOS level.
100 pin QFP (14 x 20 mm) power en-
hanced plastic package.
Power consumption: 2.0 W typical.
Synchronisation of parallel devices,
for wider bus widths.
5 V single supply operation.
Tele Communication
– STM-64
– OC-192
DSP
– High speed DAC interface
STM-16
OC-48

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GD16334100BA Summary of contents

Page 1

General Description GD16334 is a 32:4 multiplexer, intended for use with the GD16255, an STM-64 16:1 mutliplexer with PLL or in DSP ap- plications with fast DAC’s. The GD16334 consists of: u four 8:1 multiplexers u a clock generator circuit ...

Page 2

Functional Details Synchronisation The GD16334 provides a synchronisa- tion block that allows parallel operation of multiple devices for wider data width. When this is required only the synchroni- sation block in one GD16334 device is used as master controller, which ...

Page 3

Pin List Mnemonic: Pin No. O0, O0N 9, 8 O1, O1N 72, 73 O2, O2N 58, 57 O3, O3N 23, 24 CLK, CLKN 63, 64 SYNC, SYNCN 61, 62 I0, I4, I8, I12 I16, I20, I24, ...

Page 4

Package Pinout VEE 1 VEE 2 VDD 3 I12 O0N VDD 10 VEE 11 VDD 12 SEL2 13 TSTR 14 FCK 15 FCKN 16 FCKO 17 FCKON 18 SYNCO 19 ...

Page 5

Maximum Ratings These are the limits beyond which the component may be damaged. All voltages in table are referred to VEE. All currents are defined positive in to the pin. Symbol: Characteristic: V Supply Voltage CMOS DDC V Supply Voltage ...

Page 6

DC Characteristics All voltages in table are referred to VEE. All currents are defined positive in to the pin Symbol: Characteristic: V Supply Voltage DD I Supply Current DD V CML/PECL Input Common ...

Page 7

AC Characteristics Symbol: Characteristic: T Delay from FCK to FCKO pd,fcko T Delay from FCK to SYNCO pd,synco T Ix set-up time before CKO setup, hold time after CKO hold,in T Sync set-up time before CLK setup,sync T ...

Page 8

CLK SYNC Load IN OUT CKO 0 (SEL1,SEL2) (0,1) Figure 7. Relation Between Data and Clock. The internal load signal is generated relative to the rising edge of SYNC. The synchronisation sequence is initiated by the sampling of SYNC low ...

Page 9

Package Outline Bottom View Figure 8. Package 100 pin QFP Device Marking GD16334 <MaskID> <Assembly Lot #> <YYWW> Figure 9. Device Marking - Top View Data Sheet Rev. 10 GD16334 Page 9 ...

Page 10

Ordering Information To order, please specify as shown below: Product Name: Package Type: GD16334 - 100BA 100 pin QFP Mileparken 22, DK-2740 Skovlunde Denmark Telephone : +45 4492 6100 Telefax : +45 4492 5900 E-mail: : sales@giga.dk Web site : ...

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