PEF82902FV11XP Lantiq, PEF82902FV11XP Datasheet - Page 35

PEF82902FV11XP

Manufacturer Part Number
PEF82902FV11XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEF82902FV11XP

Lead Free Status / Rohs Status
Supplier Unconfirmed
2.1.3
The microcontroller clock is derived from the unregulated 15.36 MHz clock from the
oscillator and provided by the pin MCLK. Five clock rates are selectable by a
programmable prescaler which is controlled by the bits MODE1.MCLK and
MODE1.CDS corresponding to the following table.
Table 7
The clock rate is changed after CS becomes inactive.
2.2
Figure 9
Data Sheet
0
0
1
1
MODE1.
MCLK
Bits
shows the organization of the reset generation of the T-SMINT
Microcontroller Clock Generation
Reset Generation
0
1
0
1
MCLK Frequencies
MODE1.CDS = ’0’
MCLK frequency
3.84 MHz
0.96 MHz
7.68 MHz
disabled
with
23
MODE1.CDS = ’1’
MCLK frequency
Functional Description
15.36 MHz
7.68 MHz
1.92 MHz
disabled
with
â
I.
PEF 82902
2001-11-09

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