PEF2054NV21XT Infineon Technologies, PEF2054NV21XT Datasheet - Page 150

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PEF2054NV21XT

Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of PEF2054NV21XT

Lead Free Status / Rohs Status
Compliant
Table 26
Summary of Memory Operations
Application
Writing the “ P channel”
code to the CM
Reading the CM data field 8 bit value
Reading the CM code field 4 bit code contained in
Writing a switching code to
the CM
The MACR value specifies
the bandwidth and bit
position at the PCM
interface
Writing a “preprocessed
channel” code to the CM
Semiconductor Group
MADR
(C/I value, pointer to
PCM interface, etc.)
the 4 LSBs
Pointer to DM:
PCM port and
time slot
8 bit idle value
refer to figure 68
150
MAAR
Address of the
CFI port and
time slot
Address of the
CFI port and
time slot
Address of the
CFI port and
time slot
Address of the
CFI port and
time slot
refer to
figure 68
Application Hints
MACR (Hex)
C8
F0
70
(unassigned)
71
73
72
77
76
75
74
79
refer to
figure 68
H
H
H
H
H
H
H
H
H
H
H
(bits 1 … 0)
(bits 7 … 0)
(bits 7 … 4)
(bits 3 … 0)
(bits 7 … 6)
(bits 5 … 4)
(bits 3 … 2)
PEB 2055
PEF 2055

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