XC56309AG100A Freescale Semiconductor, XC56309AG100A Datasheet - Page 172

• Manufacturer Part Number: XC56309AG100A
• Description: IC DSP 24BIT 100MHZ 144-TQFP
• Manufacturer: Freescale Semiconductor
• Series: DSP563xxr
• Type: Fixed Pointr

Specifications of XC56309AG100A

• Interface: Host Interface, SSI, SCI
• Clock Rate: 100MHz
• Non-volatile Memory: ROM (576 B)
• On-chip Ram: 24kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 100°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Communication Interface (SCI)
8.2.1 Receive Data (RXD)
This input signal receives byte-oriented serial data and transfers the data to the SCI receive shift
register. Asynchronous input data is sampled on the positive edge of the receive clock (1 ×
if the SCI Clock Polarity (SCKP) bit is cleared.
when the SCI
8.2.2 Transmit Data (TXD)
This output signal transmits serial data from the SCI transmit shift register. Data changes on the
negative edge of the asynchronous transmit clock (
on the positive edge of the transmit clock.
the SCI
8.2.3 SCI Serial Clock (SCLK)
This bidirectional signal provides an input or output clock from which the transmit and/or receive
baud rate is derived in Asynchronous mode and from which data is transferred in Synchronous
mode.
This signal can be programmed as
does not need to be transmitted in Asynchronous mode. Because
I/O, there is no connection between programming the
TXD
8.3 SCI After Reset
There are several different ways to reset the SCI:
8-4
signal.
SCLK
Hardware
Software RESET instruction:
Both hardware and software resets clear the port control register bits, which configure all
I/O as GPIO input. The SCI remains in the Reset state as long as all SCI signals are
programmed as GPIO (
when at least one of the SCI I/O signals is not programmed as GPIO.
Individual reset:
During program execution, the PC2, PC1, and PC0 bits can all be cleared (that is,
individually reset), causing the SCI to stop serial activity and enter the Reset state. All SCI
status bits are set to their reset state. However, the contents of the SCR remain unaffected
so the DSP program can reset the SCI separately from the other internal peripherals.
During individual reset, internal DMA accesses to the data registers of the SCI are not
valid, and the data is unknown.
Stop processing state reset (that is, the STOP instruction)
Executing the STOP instruction halts operation of the SCI until the DSP is restarted,
TXD
can be programmed as a GPIO signal (
function is not in use.
RXD
RESET
function is not in use.
signal
PC2
,
PE2
PC1
DSP56309 User’s Manual, Rev. 1
when data is being transmitted on
, and
TXD
PC0
can be programmed as a GPIO signal (
RXD
all are cleared); the SCI becomes active only
SCLK
PE2
can be configured as a GPIO signal (
PE2
) when the SCI
) if SCKP is cleared. This output is stable
signal as
SCLK
SCLK
SCLK
is independent of SCI data
and data coming out the
TXD
function is not in use.
, since the clock
Freescale Semiconductor
PE1
) when
PE0
SCLK
)
)