AT43USB326-AU Atmel, AT43USB326-AU Datasheet - Page 22

• Manufacturer Part Number: AT43USB326-AU
• Description: IC USB KEYBOARD CTRLR 48LQFP
• Manufacturer: Atmel
• Series: AVR®r

Specifications of AT43USB326-AU

• Applications: Keyboard Controller
• Core Processor: AVR
• Program Memory Type: Mask ROM (16 kB)
• Controller Series: AT43USB
• Ram Size: 512 x 8
• Interface: USB
• Number Of I /o: 32
• Voltage - Supply: 4.4 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

External Reset
Watchdog Timer
Reset
Non-USB Related
Interrupt Handling
22
AT43USB326
An external reset is generated by a low-level on the RESET pin. Reset pulses longer than
200 ns will generate a reset. Shorter pulses are not guaranteed to generate a reset. When the
applied signal reaches the Reset Threshold Voltage - V
starts the MCU after the Time-out period t
Figure 7. External Reset During Operation
When the watchdog times out, it will generate a short reset pulse of 1 XTAL cycle duration. On
the falling edge of this pulse, the delay timer starts counting the Time-out period t
Figure 8. Watchdog Reset During Operation
The AT43USB326 has two non-USB 8-bit Interrupt Mask control registers; GIMSK (General
Interrupt Mask Register) and TIMSK (Timer/Counter Interrupt Mask Register).
When an interrupt occurs, the Global Interrupt Enable I-bit is cleared (zero) and all interrupts
are disabled. The user software can set (one) the I-bit to enable nested interrupts. The I-bit is
set (one) when a Return from Interrupt instruction, RETI, is executed.
For Interrupts triggered by events that can remain static (e.g. the Output Compare register1
matching the value of Timer/Counter1) the interrupt flag is set when the event occurs. If the
interrupt flag is cleared and the interrupt condition persists, the flag will not be set until the
event occurs the next time.
When the Program Counter is vectored to the actual interrupt vector in order to execute the
interrupt handling routine, hard-ware clears the corresponding flag that generated the inter-
rupt. Some of the interrupt flags can also be cleared by writing a logic one to the flag bit
position(s) to be cleared.
INTERNAL
TIME-OUT
TIME-OUT
INTERNAL
TIME-OUT
RESET
RESET
RESET
WDT
RESET
RESET
VCC
VCC
V
RST
1 XTAL Cycle
t
TOUT
t
TOUT
TOUT
has expired.
RST
on its positive edge, the delay timer
3313D–USB–04/06
TOUT
.