Z8018010PSG Zilog, Z8018010PSG Datasheet - Page 80

• Manufacturer Part Number: Z8018010PSG
• Description: IC 10MHZ Z180 CMOS ENH MPU 64DIP
• Manufacturer: Zilog

Specifications of Z8018010PSG

• Processor Type: Z180
• Features: 8-Bit, Enhanced Z80 Megacell
• Speed: 10MHz
• Voltage: 5V
• Mounting Type: Through Hole
• Package / Case: 64-DIP (0.750", 19.05mm)
• Processor Series: Z8018xx
• Core: Z80
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 10 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: 0 C
• Core Size: 8bit
• Cpu Speed: 10MHz
• Digital Ic Case Style: DIP
• No. Of Pins: 64
• Supply Voltage Range: 4.5V To 5.5V
• Operating Temperature Range: 0°C To +70°C
• Svhc: No SVHC (18-Jun-2010)
• Base Number: 8018010
• Rohs Compliant: Yes
• Clock Frequency: 10MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-3889; Z8018010PSG

I/O Control Register (ICR)
I/O Control Register (ICR: I/O Address = 3Fh)
PS014004-1106
Bit
Note:
ICR
the
IOA7, 6: I/O Address Relocation (bits 7,6)
IOA7
IOSTP:
I/O operation resumes when
IOSTOP
IOA7
R/W
allows relocating of the internal I/O addresses.
7
and
IOA7– IOA6 = 0 1
IOA7–IOA6 = 0 0
IOA7–IOA6 = 1 0
Figure 78. I/O Control Register (ICR: I/O Address = 3Fh)
The high-order 8 bits of 16-bit internal I/O address are always 0.
cleared to
IOA7–IOA6 = 1 1
IOSTOP
IOA6
IOA6
mode
R/W
6
relocate internal I/O as illustrated in
Mode (bit 5)—
(Figure
0
Figure 79. I/O Address Relocation
IOSTP
during
R/W
5
78).
RESET
IOSTOP
4
—
.
IOSTOP
is reprogrammed or
3
—
mode is enabled when
2
—
00FFh
00C0h
00BFh
0080h
0070h
0040h
003Fh
0000h
ICR
Figure
1
—
also controls enabling/disabling of
RESET
79.
0
—
to
IOSTP
Microprocessor Unit
0
.
is set to
IOA7
and
Architecture
1
. Normal
Z80180
IOA6
are
74