MPC8560CPX667JC Freescale Semiconductor, MPC8560CPX667JC Datasheet - Page 19

IC MPU PWRQUICC III 783-FCPBGA

MPC8560CPX667JC

Manufacturer Part Number
MPC8560CPX667JC
Description
IC MPU PWRQUICC III 783-FCPBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIIr
Datasheets

Specifications of MPC8560CPX667JC

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
667MHz
Embedded Interface Type
I2C, MII, SPI, TDM, UTOPIA
Digital Ic Case Style
BGA
No. Of Pins
783
Rohs Compliant
No
Family Name
MPC85XX
Device Core
PowerQUICC III
Device Core Size
32b
Frequency (max)
667MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.2V
Operating Supply Voltage (max)
1.26V
Operating Supply Voltage (min)
1.14V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
783
Package Type
FCBGA
For Use With
MPC8560ADS-BGA - BOARD APPLICATION DEV 8560
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8560CPX667JC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
6.2 DDR SDRAM AC Electrical Characteristics
This section provides the AC electrical characteristics for the DDR SDRAM interface.
6.2.1 DDR SDRAM Input AC Timing Specifications
Table 15
Freescale Semiconductor
At recommended operating conditions with GV
AC input low voltage
AC input high voltage
MDQS—MDQ/MECC input skew per byte
Note:
1.Maximum possible skew between a data strobe (MDQS[n]) and any corresponding bit of data (MDQ[8n + {0...7}] if
2.For timing budget analysis, the MPC8560 consumes ±550 ps of the total budget.
0 ≤ n ≤ 7) or ECC (MECC[{0...7}] if n=8).
provides the input AC timing specifications for the DDR SDRAM interface.
MDQS[n]
MDQ[n]
Parameter
For DDR = 333 MHz
For DDR ≤ 266 MHz
MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
Table 15. DDR SDRAM Input AC Timing Specifications
Figure 4. DDR SDRAM Interface Input Timing
DD
of 2.5 V ± 5%.
t
DISKEW
Symbol
t
DISKEW
V
V
IL
IH
MV
REF
-1125
-750
Min
+ 0.31
t
DISKEW
MV
GV
REF
DD
1125
Max
750
– 0.31
+ 0.3
Unit
ps
V
V
Notes
DDR SDRAM
1, 2
19

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