MPC8560CPX667JC Freescale Semiconductor, MPC8560CPX667JC Datasheet - Page 80

• Manufacturer Part Number: MPC8560CPX667JC
• Description: IC MPU PWRQUICC III 783-FCPBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC IIIr

Specifications of MPC8560CPX667JC

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 667MHz
• Voltage: 1.2V
• Mounting Type: Surface Mount
• Package / Case: 783-FCPBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 667MHz
• Embedded Interface Type: I2C, MII, SPI, TDM, UTOPIA
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Rohs Compliant: No
• Family Name: MPC85XX
• Device Core: PowerQUICC III
• Device Core Size: 32b
• Frequency (max): 667MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.2V
• Operating Supply Voltage (max): 1.26V
• Operating Supply Voltage (min): 1.14V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 783
• Package Type: FCBGA
• For Use With: MPC8560ADS-BGA - BOARD APPLICATION DEV 8560
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant

Clocking
15 Clocking
This section describes the PLL configuration of the MPC8560. Note that the platform clock is identical to
the CCB clock.
15.1 Clock Ranges
Table 55
specifications for the memory bus.
80
e500 core processor frequency
Notes:
1.Caution: The CCB to SYSCLK ratio and e500 core to CCB ratio settings must be chosen such that the resulting SYSCLK
2.)The minimum e500 core frequency is based on the minimum platform frequency of 200 MHz.
3.)The 1.0 GHz core frequency is based on a 1.3 V VDD supply voltage.
Memory bus frequency
Notes:
1.Caution: The CCB to SYSCLK ratio and e500 core to CCB ratio settings must be chosen such that the resulting SYSCLK
2.The memory bus speed is half of the DDR data rate, hence, half of the platform clock frequency.
3.)The 1.0 GHz core frequency is based on a 1.3 V VDD supply voltage.
frequency, e500 (core) frequency, and CCB frequency do not exceed their respective maximum or minimum operating
frequencies. Refer to
settings.
frequency, e500 (core) frequency, and CCB frequency do not exceed their respective maximum or minimum operating
frequencies. Refer to
settings.
Characteristic
Characteristic
provides the clocking specifications for the processor core and
Section 15.2, “Platform/System PLL
Section 15.2, “Platform/System PLL
MPC8560 Integrated Processor Hardware Specifications, Rev. 4.2
Table 55. Processor Core Clocking Specifications
Table 56. Memory Bus Clocking Specifications
Min
400
Min
100
667 MHz
667 MHz
Maximum Processor Core Frequency
Max
Maximum Processor Core Frequency
Max
667
166
Min
400
Min
100
Ratio,” and
Ratio,” and
833 MHz
833 MHz
Max
Max
833
166
Section 15.3, “e500 Core PLL
Section 15.3, “e500 Core PLL
Min
400
Min
100
Table 56
1 GHz
1 GHz
1000
Max
Max
166
provides the clocking
Freescale Semiconductor
Ratio,” for ratio
Ratio,” for ratio
MHz
MHz
Unit
Unit
1, 2, 3
Notes
1, 2, 3
Notes