MC68MH360EM25L Freescale Semiconductor, MC68MH360EM25L Datasheet - Page 197

• Manufacturer Part Number: MC68MH360EM25L
• Description: IC MPU QUICC ETHER 25MHZ 240FQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360EM25L

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 240-FQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Freescale Semiconductor, Inc.
CPU32+
5. De-allocate the stack and return control to the faulted program.
5.5.3.2.5 Type III—Correcting Faults by Conversion and Restart. In some situations it
may be necessary to rerun all the operand transfers for a faulted instruction rather than con-
tinue from a faulted operand. Clearing the MV bit in the stacked SSW converts a type III fault
into a type II fault. Consequently, MOVEM, like all other type II exceptions, will be restarted
upon return from the exception handler. When a fault occurs after an operand has trans-
ferred, that transfer is not "undone". However, these memory locations are accessed a sec-
ond time when the instruction is restarted. If a register used in an EA calculation is
overwritten before a fault occurs, an incorrect EA is calculated upon instruction restart.
5.5.3.2.6 Type III—Correcting Faults via RTE. The preferred method of MOVEM bus fault
recovery is to correct the cause of the fault and then execute an RTE instruction without
altering the stack contents.
The RTE recognizes that MOVEM was in progress when a fault occurred, restores the
appropriate machine state, refetches the instruction, repeats the faulted transfer, and con-
tinues the instruction.
MOVEM is the only instruction continued upon return from an exception handler. Although
the instruction is refetched, the EA is not recalculated, and the mask is rescanned the same
number of times as before the fault. Modifying the code prior to RTE can cause unexpected
results.
5.5.3.2.7 Type IV—Correcting Faults via Software. Bus error exceptions can occur dur-
ing exception processing while the processor is fetching an exception vector or while it is
stacking. The same stack frame and SSW are used in both cases, but each has a distinct
fault address. The stacked faulted exception format/vector word identifies the type of faulted
exception and the contents of the remainder of the frame. A fault address corresponding to
the vector specified in the stacked format/vector word indicates that the processor could not
obtain the address of the exception handler.
A bus error exception handler should execute RTE after correcting a fault. RTE restores the
internal machine state, fetches the address of the original exception handler, recreates the
original exception stack frame, and resumes execution at the exception handler address.
If the fault is intractable, the exception handler should rewrite the faulted exception stack
frame at SP
$14
$06 and then jump directly to the original exception handler. The stack
frame can be generated from the information in the bus error frame: the pre-exception SR
(SP $0C), the format/vector word (SP $0E), and, if the frame being written is a six-word
frame, the PC of the instruction causing the exception (SP
$10). The return PC value is
available at SP $02.
A stacked fault address equal to the current SP may indicate that, although the first excep-
tion received a bus error while stacking, the bus error exception stacking successfully com-
pleted. This occurrence is extremely improbable, but the CPU32+ supports recovery from it.
Once the exception handler determines that the fault has been corrected, recovery can pro-
ceed as described previously. If the fault cannot be corrected, move the supervisor stack to
another area of memory, copy all valid stack frames to the new stack, create a faulted
MOTOROLA
MC68360 USER’S MANUAL
5-55
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