DS18S20 Maxim Integrated Products, DS18S20 Datasheet - Page 17

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DS18S20

Manufacturer Part Number
DS18S20
Description
Board Mount Temperature Sensors
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS18S20

Full Temp Accuracy
+/- 2 C
Package / Case
TO-92
Digital Output - Bus Interface
Serial (1-Wire)
Digital Output - Number Of Bits
9 bit
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 55 C
Output Type
Digital
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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data from the DS18B20 is valid for 15µs after the falling edge that initiated the read time slot. Therefore,
the master must release the bus and then sample the bus state within 15µs from the start of the slot.
Figure 15 illustrates that the sum of T
Figure 16 shows that system timing margin is maximized by keeping T
and by locating the master sample time during read time slots towards the end of the 15µs period.
Figure 15. Detailed Master Read 1 Timing
Figure 16. Recommended Master Read 1 Timing
RELATED APPLICATION NOTES
The following application notes can be applied to the DS18B20 and are available on our website at
www.maxim-ic.com.
Application Note 27: Understanding and Using Cyclic Redundancy Checks with Maxim iButton Products
Application Note 122: Using Dallas' 1-Wire ICs in 1-Cell Li-Ion Battery Packs with Low-Side N-Channel
Safety FETs Master
Application Note 126: 1-Wire Communication Through Software
Application Note 162: Interfacing the DS18x20/DS1822 1-Wire Temperature Sensor in a Microcontroller
Environment
Application Note 208: Curve Fitting the Error of a Bandgap-Based Digital Temperature Sensor
Application Note 2420: 1-Wire Communication with a Microchip PICmicro Microcontroller
Application Note 3754: Single-Wire Serial Bus Carries Isolated Power and Data
Sample 1-Wire subroutines that can be used in conjunction with Application Note 74: Reading and
Writing iButtons via Serial Interfaces can be downloaded from the Maxim website.
1-WIRE BUS
GND
1-WIRE BUS
GND
V
V
PU
PU
small
T
INT
=
small
T
RC
=
T
INT
> 1µs
VIH of Master
INIT
LINE TYPE LEGEND
, T
RC
Bus master pulling low
Resistor pullup
, and T
17 of 22
15µs
15µs
T
SAMPLE
RC
must be less than 15µs for a read time slot.
VIH of Master
Master samples
Master samples
INIT
and T
RC
as short as possible
DS18B20

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