CY7C68033-56LFXC Cypress Semiconductor Corp, CY7C68033-56LFXC Datasheet - Page 2

• Manufacturer Part Number: CY7C68033-56LFXC
• Description: IC USB NX2LP NAND CNTRLR 56VQFN
• Manufacturer: Cypress Semiconductor Corp
• Series: CY7Cr

Specifications of CY7C68033-56LFXC

• Controller Type: USB 2.0 NAND Flash Controller
• Interface: USB
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 43mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 56-VQFN Exposed Pad, 56-HVQFN, 56-SQFN, 56-DHVQFN
• Controller Family/series: (8051) USB
• No. Of I/o's: 12
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Digital Ic Case Style: QFN
• Supply Voltage Range: 3V To 3.6V
• Core Size: 8 Bit
• Program Memory Size: 15KB
• Embedded Interface Type: I2C, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY3686 - DEV KIT USB 2.0 PER OLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Default NAND Firmware Features
Because the NX2LP-Flex
USB mass storage applications, a default firmware image is
included in the development kit with the following features:
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Document Number: 001-04247 Rev. *H
High (480 Mbps) or full (12 Mbps) speed USB support
NAND sizes supported per chip select
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12 configurable GPIO pins
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Industry standard ECC NAND Flash correction
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512 bytes for up to 1 Gb capacity
2K bytes for up to 8 Gb capacity
4K bytes for up to 16 Gb capacity
Two dedicated chip enable (CE#) pins
Six configurable CE#/GPIO pins
• Up to eight NAND Flash single-device (single-die) chips
• Up to four NAND Flash dual-device (dual-die) chips are
• Compile option enables unused CE# pins to be configured
Four dedicated GPIO pins
1 bit for every 256-bit correction
2-bit error detection
are supported
supported
as GPIOs
®
is intended for NAND Flash-based
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The default firmware image implements a USB 2.0 NAND Flash
controller. This controller adheres to the Mass Storage Class
Bulk-Only Transport Specification. The USB port of the
NX2LP-Flex is connected to a host computer directly or through
the downstream port of a USB hub. The host software issues
commands and data to the NX2LP-Flex and receives status and
data from the NX2LP-Flex using standard USB protocol.
The default firmware image supports industry leading 8-bit
NAND Flash interfaces and both common NAND page sizes of
512 and 2k bytes. Up to eight CE# pins enable the NX2LP-Flex
to be connected to up to eight single or four dual-die NAND Flash
chips.
Complete source code and documentation for the default
firmware image are included in the
to enable customization for meeting design requirements.
Additionally, compile options for the default firmware enable
quick configuration of some features to decrease design effort
and increase time-to-market advantages.
Industry standard (SmartMedia) page management for wear
leveling algorithm, bad block handling, and physical to logical
management.
8-bit NAND Flash interface support
Support for 30 ns, 50 ns, and 100 ns NAND Flash timing
Complies with the USB mass storage class specification
revision 1.0
CY7C68033, CY7C68034
NX2LP-Flex development kit
Page 2 of 38
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