TDA8023TT/C1,118 NXP Semiconductors, TDA8023TT/C1,118 Datasheet
TDA8023TT/C1,118
Specifications of TDA8023TT/C1,118
TDA8023TT-T
TDA8023TT-T
Related parts for TDA8023TT/C1,118
TDA8023TT/C1,118 Summary of contents
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TDA8023 Low power IC card interface Rev. 01 — 16 July 2007 1. General description The TDA8023 is a complete cost-efficient, low-power analog interface for synchronous or asynchronous smart cards. It can be placed between the card and the microcontroller ...
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... NXP Semiconductors 3. Applications I Banking terminals I Internet terminals I Set-top boxes I Portable IC card readers 4. Quick reference data Table 1. Quick reference data DD(INTF) CLKIN Symbol Parameter Supply V supply voltage DD V DC-to-DC converter DD(DCDC) supply voltage V interface supply voltage on pin V DD(INTF) I supply current DD Supply voltage for the card: pin V ...
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... NXP Semiconductors Table 1. Quick reference data DD(INTF) CLKIN Symbol Parameter General t deactivation time deact P total power dissipation tot T ambient temperature amb [1] Sum of currents on pins V and V DD [2] Two ceramic multilayer capacitors of minimum 100 nF with low Equivalent Series Resistance (ESR) should be used in order to meet these specifi ...
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... NXP Semiconductors optional external resistor bridge R2 R1 Fig 2. Block diagram with inductive DC-to-DC converter 7. Pinning information 7.1 Pinning Fig 3. Pin configuration TDA8023TT TDA8023_1 Product data sheet 100 PORADJ 20 CDEL 21 SUPPLY SUPERVISOR C CDEL GND 10 TDA8023 4 V DDI 3 SDWN 5 SDA 6 SCL SEQUENCER ...
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... NXP Semiconductors 7.2 Pin description Table 3. Symbol VUP INT SDWN V DDI SDA SCL SAD0 SPRES CLKIN GND I/OUC C8 C4 I/O GNDC CLK V CC RST PRES PORADJ CDEL V DD SAM GNDP SBM V DDP SBP SAP [ input output supply configuration. [2] PRES is active-HIGH when SPRES = LOW and PRES is active-LOW when SPRES = HIGH. ...
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... NXP Semiconductors 8. Functional description Remark: Throughout this document assumed that the reader is familiar with ISO 7816 and EMV 2000 terminology. 8.1 Power supplies The supply pins for the TDA8023 are V 2 6.5 V. The supply voltages V TDA8023 in any time sequence. All interface signals with the system controller are referenced to a separate supply voltage ...
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... NXP Semiconductors 8.2.2 With external divider on pin PORADJ If an external resistor bridge is connected to pin PORADJ (R1 to GND and shown in hysteresis voltage are overridden by externally determined ones. The voltage on pin PORADJ is: V PORADJ where k = ------------------- - R1 The thresholds that are applied by the TDA8023 to this voltage V ...
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... NXP Semiconductors 8.2.4 Shutdown mode When pin SDWN = HIGH, the TDA8023 is in Shutdown mode; the consumption in this mode is less than 10 A. The I If the card is extracted or inserted when the TDA8023 is in Power-down mode, pin INT becomes LOW and stays LOW as long as pin SDWN = HIGH. ...
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... NXP Semiconductors Within the I mode (400 kHz clock rate) are defined. The TDA8023 operates in both Fast-speed and Standard modes. By definition, a device that sends a signal is called a transmitter and a device that receives the signal is called a receiver. The device that controls the signal is called the master. The devices that are controlled by the master are called slaves ...
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... NXP Semiconductors 8.3.5 Registers Table 6. Table of registers Bit Register 0 Read mode Write mode Status Command 7 ACTIVE VCC1V8 6 EARLY I/OEN 5 MUTE REG1 4 PROT REG0 3 SUPL PDWN 2 CLKSW 5V/3VN 1 PRESL WARM 0 PRES START Table 7. Bit When at least one of the bits PRESL, PROT, MUTE and EARLY is set, pin INT goes LOW until the status byte has been read ...
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... NXP Semiconductors Table 8. Bit Table 9. Bit and 2 1 and 0 [1] Synchronous or asynchronous cards management are defined when bit START is set: the TDA8023 will be in asynchronous cards management when bit RSTIN = 1 when bit START is set to logic 1. TDA8023_1 Product data sheet Command - Register 0 in Write mode bit description ...
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... NXP Semiconductors Table 10. Bit Table 11. Bit Table 12. Bit bit RSTIN = 0 when bit START is set to logic 1, then pin RST is controlled by bit RSTIN. Else, pin RST = LOW during a number of CLK periods, defined by the 16-bit CLK count register C[15:0], and goes HIGH afterwards. There are two synchronous card management types: • ...
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... NXP Semiconductors • Doubler: – – • Tripler: – 8.4.2 Inductive configuration The external components are a diode, a coil of 6.8 H and a capacitor of 4.7 F (see Figure 2). In this configuration the DC-to-DC converter acts as follows. • • • 8.5 V buffer CC In all modes (follower, doubler, tripler), the DC-to-DC converter is able to deliver 60 mA ...
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... NXP Semiconductors When everything is satisfactorily present (voltage supply, card present, no hardware problems) the system controller may initiate an activation sequence of a present card: 1. The internal oscillator changes to its high frequency (t 2. The DC-to-DC converter is started ( The voltage on pin I/O rises CLK is sent to the card and pin RST is enabled (t ...
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... NXP Semiconductors 8.6.2 Deactivation sequence When the session is completed, the microcontroller resets bit START to logic 0 (t Figure 6). The circuit then executes an automatic deactivation sequence: 1. Card reset: pin RST falls to LOW (t 2. CLK is stopped (t 3. Pin I/O falls Pin V 5. The DC-to-DC converter is stopped and pins CLK, RST, V low-impedance with relation to GNDC (t 6 ...
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... NXP Semiconductors In case of overcurrent on pin V supply dropout, DC-to-DC out of limits, or overcurrent on pin RST, the TDA8023 performs an automatic emergency deactivation sequence on the card, resets bit START and pulls pin INT LOW. 9. Limiting values Table 13. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). ...
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... NXP Semiconductors 11. Characteristics Table 15. Supply DD(INTF) CLKIN Symbol Parameter V supply voltage DD V DC-to-DC converter DD(DCDC) supply voltage V interface supply voltage DD(INTF) I supply current DD I interface supply current DD(INTF) V LOW-level power-on reset th(POR)L threshold voltage V power-on reset hysteresis hys(POR) voltage [1] Sum of currents on pins V ...
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... NXP Semiconductors Table 17. DC-to-DC converter DD(INTF) CLKIN Symbol Parameter f internal oscillator frequency osc(int) V voltage on pin VUP VUP V detection voltage det Table 18. Card drivers DD(INTF) CLKIN Symbol Parameter Supply voltage for the card: pin V V inactive mode output o(inact) voltage ...
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... NXP Semiconductors Table 18. Card drivers …continued DD(INTF) CLKIN Symbol Parameter Reset output to the card: pin RST V inactive mode output o(inact) voltage I inactive mode output o(inact) current V LOW-level output OL voltage V HIGH-level output OH voltage t rise time r t fall time f Clock output to the card: pin CLK ...
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... NXP Semiconductors Table 18. Card drivers …continued DD(INTF) CLKIN Symbol Parameter I pull-up current pu t delay time d t rise time r t clock rise time TLH C input capacitance i R internal pull-up pu(int) resistance f maximum input clock max frequency Card presence input: pin PRES, active-HIGH when pin SPRES = LOW or active-LOW when pin SPRES = HIGH ...
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... NXP Semiconductors Table 20. Interface signals to host controller DD(INTF) CLKIN Symbol Parameter t rise time r t clock rise time TLH R internal pull-up resistance pu(int) Clock input: pin CLKIN f frequency on pin CLKIN CLKIN V LOW-level input voltage IL V HIGH-level input voltage IH t rise time ...
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... NXP Semiconductors Table 20. Interface signals to host controller DD(INTF) CLKIN Symbol Parameter 2 I C-bus timing; see Figure 7 f SCL clock frequency SCL t bus free time between a STOP BUF and START condition t hold time (repeated) START HD;STA condition t LOW period of the SCL clock ...
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... NXP Semiconductors SDA t t BUF LOW SCL HD;STA P = STOP condition START condition. Fig 7. Timing requirements for the I TDA8023_1 Product data sheet HIGH HD;DAT SU;DAT 2 C-bus Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface t HD;STA SU;STA © NXP B.V. 2007. All rights reserved. ...
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... NXP Semiconductors 12. Application information IC2 HOST CONTROLLER V INT DD GND SDA SCL CLKout I/OAUX V DD (1) Low-ESR capacitor, placed near the IC. (2) Low-ESR capacitor, placed near the C1 contact. Fig 8. Application diagram: typical TDA8023TT application with capacitive DC-to-DC converter TDA8023_1 Product data sheet V DD ...
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... NXP Semiconductors IC2 HOST CONTROLLER 4 INT DD GND SDA SCL CLKout 4.7 k I/OAUX V DD (1) Low-ESR capacitor, placed near the IC. (2) Low-ESR capacitor, placed near the C1 contact. Fig 9. Application diagram: typical TDA8023TT application with inductive DC-to-DC converter TDA8023_1 Product data sheet IC1 V VUP ...
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... NXP Semiconductors 13. Package outline TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 14. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 14.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 14.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 11. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . TDA8023_1 Product data sheet maximum peak temperature = MSL limit, damage level temperature minimum peak temperature ...
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... NXP Semiconductors 15. Revision history Table 24. Revision history Document ID Release date TDA8023_1 20070716 TDA8023_1 Product data sheet Data sheet status Change notice Product data sheet - Rev. 01 — 16 July 2007 TDA8023 Low power IC card interface Supersedes - © NXP B.V. 2007. All rights reserved. ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 7.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 8 Functional description . . . . . . . . . . . . . . . . . . . 6 8.1 Power supplies . . . . . . . . . . . . . . . . . . . . . . . . . 6 8.2 Voltage supervisor . . . . . . . . . . . . . . . . . . . . . . 6 8.2.1 Without external divider on pin PORADJ . . . . . 6 8 ...