DS2482S-800+T&R Maxim Integrated Products, DS2482S-800+T&R Datasheet - Page 20

• Manufacturer Part Number: DS2482S-800+T&R
• Description: IC MASTER I2C-1WIRE 8CH 16-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of DS2482S-800+T&R

• Controller Type: I²C Bus Controller
• Interface: I²C
• Voltage - Supply: 3.3 V, 5V
• Current - Supply: 750µA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Case C: 1-Wire idle (1WB = 0), busy polling until the 1-Wire Command is completed.
Poll the Status Register until the 1WB bit has changed from 1 to 0. Then set the read pointer to the read data
register (code E1h) and access the device again to read the data byte that was obtained from the 1-Wire IO
channel.
Case D: 1-Wire busy (1WB = 1)
The master should stop and restart as soon as the DS2482 does not acknowledge the command code.
1-Wire Single Bit, e. g., to generate a single time slot on a 1-Wire IO channel
Case A: 1-Wire idle (1WB = 0), no busy polling
The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the result
from the 1-Wire single-bit command.
Case B: 1-Wire idle (1WB = 0), busy polling until the 1-Wire Command is completed.
When 1WB has changed from 1 to 0, the Status Register holds the valid result of the 1-Wire Single Bit command.
Case C: 1-Wire busy (1WB = 1)
The master should stop and restart as soon as the DS2482 does not acknowledge the command code.
1-Wire Triplet, e.g., to perform a Search ROM function on a 1-Wire IO channel
Case A: 1-Wire idle (1WB = 0), no busy polling
The idle time is needed for the 1-Wire function to complete. Then access the device in read mode to get the result
from the 1-Wire Triplet command.
Case B: 1-Wire idle (1WB = 0), busy polling until the 1-Wire Command is completed.
When 1WB has changed from 1 to 0, the Status Register holds the valid result of the 1-Wire Triplet command.
Sr
S
S
S
S
S
S
S
AD,0
AD,0
AD,0
AD,0
AD,0
AD,0
AD,0
AD,0
A
A
A
A
A
A
A
A
1WRB
1WRB
1WSB
1WSB
1WSB
SRP
1WT
1WT
A\
A\
A
A
A
A
A
A
Sr
Sr
Sr
S
S
<byte>
<byte>
<byte>
<byte>
E1h
P
P
AD,1
AD,1
AD,1
AD,1
AD,1
20 of 23
A
A
A
A
A
A
A
A
A
A
Sr
P
P
<byte>
<byte>
<byte>
<byte>
<byte>
(Idle)
(Idle)
AD,1
A\
A\
A
A
A
A
<byte>
<byte>
<byte>
P
P
<byte>
Repeat until the 1WB
bit has changed to 0
Repeat until the 1WB
bit has changed to 0
Repeat until the 1WB
bit has changed to 0
A\
A\
A\
A\
P
P
P