COM20022I-HT SMSC, COM20022I-HT Datasheet - Page 46

IC CTRLR ARCNET 2KX8 RAM 48-TQFP

COM20022I-HT

Manufacturer Part Number
COM20022I-HT
Description
IC CTRLR ARCNET 2KX8 RAM 48-TQFP
Manufacturer
SMSC
Series
ARCNETr
Datasheet

Specifications of COM20022I-HT

Controller Type
ARCNET Controller
Interface
Differential
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
65mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP, 48-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
638-1003

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Quantity
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Manufacturer:
SMSC
Quantity:
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Part Number:
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Revision 09-27-07
BIT
7-0
Terminal Count
Timer Mode
Cycle Mode
BIT NAME
D0-D7
I/O Address 02H
TC7-TC0
TIM7-TIM0
CYC7-CYC0
SYMBOL
High
Figure 6.2
Address Pointer Register
I/O Address 04H
11-Bit Counter
Data Register
Table 6.13 - DMA Count Register
DATASHEET
- Sequential Access Operation
TC7-TC0: Used for non-burst or burst mode. These are the lower 8
bits of the Terminal Count setting register. The MSB (TC8) is in the
Bus Control Register. The Terminal Count setting range is from 1 to
512 counts (TC8 - TC0 all zeroes means 512 counts).
TIM7-TIM0: Used for Programmable-Burst by Timer mode. These bits
are for setting the term of the continuous DMA transfer. The time
range is from 100nS to 25.6 μ S. The step is 100nS (TIM7-TIM0 all
zeroes means 25.6 μ s).
CYC7-CYC0: Used for Programmable-Burst by Cycle mode. These
bits are for setting the term of the continuous DMA transfer. The cycle
range is from 2 to 256 cycles. CYC7-CYC0 all zeroes means 256
cycles. (1 is illegal)
I/O Address 03H
Low
Page 46
Data Bus
Memory
Address Bus
Memory
10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
8
11
DESCRIPTION
INTERNAL
2K x 8
RAM
SMSC COM20022I
Datasheet

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