LAN91C96-MU SMSC, LAN91C96-MU Datasheet - Page 63

IC ETHERNET CTLR MAC PHY 100TQFP

LAN91C96-MU

Manufacturer Part Number
LAN91C96-MU
Description
IC ETHERNET CTLR MAC PHY 100TQFP
Manufacturer
SMSC
Datasheet

Specifications of LAN91C96-MU

Controller Type
Ethernet Controller (IEEE 802.3)
Interface
Serial EEPROM
Voltage - Supply
3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1018

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Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Datasheet
Note 7.2
SMSC LAN91C96 5v&3v
nXNDEC - Read only bit reflecting the status of the nXENDEC pin.
IOS0-2 - Read only bits reflecting the status of the IOS0-2 pins.
MDO - The value of this bit drives the EEDO pin when MDOE=1.
MDCLK - The value of this bit drives the EESK pin when MDOE=1.
MDOE - When this bit is high pins EEDO EECS and EESK will be used for transceiver management
functions, otherwise the pins assume the EEPROM values.
I/O SPACE - BANK3
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
OFFSET
The LAN91C96 shares the same chip ID (#4) as the LAN91C94. The Rev. ID for the LAN91C96 will begin
from six (#6).
A
0
0
EEDO
EECS
EESK
0
1
CHIP ID VALUE
CHIP
(Note 7.2)
REVISION REGISTER
3
4
5
4
7
8
9
1
0
Serial EEPROM Chip Select
Serial EEPROM Data Out
DATASHEET
NAME
Serial EEPROM Clock
1
0
MODE=0
Page 63
LAN91C90/LAN91C92
0
1
LAN91C100FD
LAN91C100
LAN91C110
LAN91C94
LAN91C95
LAN91C96
DEVICE
READ ONLY
0
0
TYPE
REV
Bit MCLK
MODE=1
Bit MDO
1
0
0
SYMBOL
1
1
REV
Revision 1.0 (10-24-08)

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