PIC16F77-I/P Microchip Technology Inc., PIC16F77-I/P Datasheet - Page 170

• Manufacturer Part Number: PIC16F77-I/P
• Description: 40 PDIP .600in TUBE, 14 KB Flash, 368 RAM, 33 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F77-I/P

• A/d Inputs: 8-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 33
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Temperature Range: –40 to 125 °C
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part

PIC16F7X
Timing Parameter Symbology ......................................... 125
Timing Requirements
TMR1CS bit ....................................................................... 47
TMR1ON bit ....................................................................... 47
TMR2ON bit ....................................................................... 52
TOUTPS<3:0> bits ............................................................ 52
TRISA Register .................................................................. 31
TRISB Register .................................................................. 33
TRISC Register .................................................................. 35
TRISD Register .................................................................. 36
TRISE Register .................................................................. 37
TXSTA Register
U
UA ...................................................................................... 60
Universal Synchronous Asynchronous
Update Address bit, UA ..................................................... 60
USART ............................................................................... 69
DS30325B-page 168
USART Synchronous Transmission
Wake-up from SLEEP via Interrupt .......................... 103
Watchdog Timer ...................................................... 128
Capture/Compare/PWM (CCP1 and CCP2) ............ 130
CLKOUT and I/O ..................................................... 127
External Clock .......................................................... 126
I
I2C Bus START/STOP Bits ..................................... 135
Parallel Slave Port ................................................... 131
RESET, Watchdog Timer, Oscillator
SPI Mode ................................................................. 134
Timer0 and Timer1 External Clock .......................... 129
USART Synchronous Receive ................................. 137
USART Synchronous Transmission ........................ 137
IBF Bit ........................................................................ 38
IBOV Bit ..................................................................... 38
PSPMODE bit ..................................................... 36
SYNC bit .................................................................... 69
TRMT bit .................................................................... 69
TX9 bit ....................................................................... 69
TX9D bit ..................................................................... 69
TXEN bit .................................................................... 69
Receiver Transmitter. See USART
Asynchronous Mode .................................................. 73
Asynchronous Receiver ............................................. 75
Asynchronous Reception ........................................... 76
Asynchronous Transmission
Asynchronous Transmitter ......................................... 73
2
C Bus Data ............................................................ 136
Associated Registers ......................................... 76
Associated Registers ......................................... 74
(Through TXEN) ........................................ 78
Start-up Timer, Power-up Timer
and Brown-out Reset ............................... 128
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37
W
Wake-up from SLEEP ...............................................89
Wake-up Using Interrupts ................................................ 102
Watchdog Timer (WDT) ............................................89
WCOL bit ........................................................................... 61
Write Collision Detect bit (WCOL) ..................................... 61
WWW, On-Line Support ...................................................... 4
Baud Rate Generator (BRG) ..................................... 71
Mode Select (SYNC Bit) ............................................ 69
Overrun Error (OERR Bit) ......................................... 70
RC6/TX/CK Pin .....................................................9
RC7/RX/DT Pin .....................................................9
Serial Port Enable (SPEN Bit) ................................... 69
Single Receive Enable (SREN Bit) ............................ 70
Synchronous Master Mode ....................................... 77
Synchronous Master Reception ................................ 79
Synchronous Master Transmission ........................... 77
Synchronous Slave Mode ......................................... 80
Synchronous Slave Reception .................................. 81
Synchronous Slave Transmission ............................. 80
Transmit Data, 9th Bit (TX9D) ................................... 69
Transmit Enable (TXEN bit) ...................................... 69
Transmit Enable, Nine-bit (TX9 bit) ........................... 69
Transmit Shift Register Status (TRMT bit) ................ 69
Interrupts .............................................................95
MCLR Reset .............................................................. 96
WDT Reset ................................................................ 96
Associated Registers ............................................... 101
Enable (WDTE Bit) .................................................. 101
Postscaler. See Postscaler, WDT
Programming Considerations .................................. 101
RC Oscillator ........................................................... 101
Time-out Period ....................................................... 101
WDT Reset, Normal Operation .................... 93
WDT Reset, SLEEP ..................................... 93
Baud Rate Formula ........................................... 71
Baud Rates, Asynchronous Mode
Baud Rates, Asynchronous Mode
Sampling ........................................................... 71
Associated Registers ........................................ 80
Associated Registers ........................................ 78
Associated Registers ........................................ 81
Associated Registers ........................................ 81
(BRGH = 0) ....................................... 72
(BRGH = 1) ....................................... 72
2002 Microchip Technology Inc.
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