ICS1893YI-10LF IDT, Integrated Device Technology Inc, ICS1893YI-10LF Datasheet - Page 44

• Manufacturer Part Number: ICS1893YI-10LF
• Description: PHYCEIVER LOW PWR 3.3V 64-TQFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: PHYceiver™r
• Type: PHY Transceiverr

Specifications of ICS1893YI-10LF

• Protocol: MII
• Voltage - Supply: 3.14 V ~ 3.47 V
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 1893YI-10LF

6.2.4 Auto-Negotiation: Reset and Restart
6.2.4.1 Auto-Negotiation Reset
6.2.4.2 Auto-Negotiation Restart
6.2.5 Auto-Negotiation: Progress Monitor
ICS1893Y-10 Rev F 1/20/04
If enabled, execution of the ICS1893Y-10 auto-negotiation process occurs at power-up and upon
management request. There are two primary ways to begin the Auto-Negotiation state machine:
•
•
During a reset, the ICS1893Y-10 initializes its Auto-Negotiation sublayer modules to their default states.
(That is, the Auto-Negotiation Arbitration State Machine and the Auto-Negotiation Progress Monitor reset to
their idle states.) In addition, the Auto-Negotiation Progress Monitor status bits are all set to logic zero. This
action occurs for any type of reset (hardware reset, software reset, or power-on reset).
As with a reset, during an Auto-Negotiation restart, the ICS1893Y-10 initializes the Auto-Negotiation
Arbitration State Machine and the Auto-Negotiation Progress Monitor modules to their default states.
However, during an Auto-Negotiation Restart, the Auto-Negotiation Progress Monitor status bits maintain
their current state. Only three events can alter the state of the Auto-Negotiation Progress Monitor status
bits after a Restart: (1) an STA read operation, (2) a reset, or (3) the Auto-Negotiation Arbitration State
Machine progressing to a higher state or value.
The Auto-Negotiation Progress Monitor Status bits change only if they are progressing to a state with a
value greater than their current state (that is, a state with a higher logical value than that of their current
state). For a detailed explanation of these bits and their operation, see
Progress
After the Auto-Negotiation Arbitration State Machine reaches its final state (which is Auto-Negotiation
Complete), only an STA read of the QuickPoll Detailed Status Register or an ICS1893Y-10 reset can alter
these status bits.
Any of the following situations initiates a restart of the ICS1893Y-10 Auto-Negotiation sublayer:
•
•
•
Under typical circumstances, the Auto-Negotiation sublayer can establish a connection with the
ICS1893Y-10’s remote link partner. However, some situations can prevent the auto-negotiation process
from properly achieving this goal. For these situations, the ICS1893Y-10 has an Auto-Negotiation Progress
Monitor to provide detailed status information to its Station Management (STA) entity. With this status
information, the STA can diagnose the failure mechanism and – in some situations – establish the link by
correcting the problem.
When enabled, the auto-negotiation process typically requires less than 500 ms to execute, independent of
the link partner's ability to perform the auto-negotiation process. Typically, an STA polls both the
Auto-Negotiation Complete bit (bit 1.5) and the Link Status bit (bit 1.2) to determine when a link is
ICS1893Y-10 reset
Auto-Negotiation Restart
A link failure
In software mode:
In hardware mode:
– Writing a logic one to the Control Register’s Restart Auto-Negotiation bit (bit 0.9), which is a self-
– Toggling the Control Register’s Auto-Negotiation Enable bit (bit 0.12) from a logic one to a logic zero,
– Toggling the ANSEL (Auto-Negotiation Select) pin from a logic one to a logic zero, and back to a logic
ICS1893Y-10 Data Sheet - Release
clearing bit.
and back to a logic one.
one.
Monitor”.
Copyright © 2004, Integrated Circuit Systems, Inc.
All rights reserved.
44
Section 6.2.5, “Auto-Negotiation:
Chapter 6 Functional Blocks
January, 2004